Abstract: The subject matter disclosed herein relates to an imaging device including a laminated portion of an actuator or actuator support.

Abstract: The present invention relates to a method and apparatus for code acquisition. The present invention performs variable delay correlation to obtain the peak correlation result which is immune to carrier frequency offset and Doppler. The present invention makes use of a mapping parameter which is immune to sampling frequency offset. In particular, the present invention is applicable to the DTMB standard.

Abstract: Subject matter disclosed herein may relate to packaging for multi-chip semiconductor devices as may be used, for example, in flash memory devices. In an example embodiment, a semiconductor chip may comprise a through-silicon via and a sidewall pad.

Abstract: A structure is provided to create an efficient light pattern conversion from a narrow angular light beam pattern of a light emitting source to a wide angle light intensity distribution for an omnidirectional lighting assembly. A heat conductive substrate includes an LED array with at least one central and at least one surrounding LED. A hollow light diverting component is positioned over the LED array; a central LED is within the hollow component while surrounding LEDs are positioned outside. Light emitted by the central LED is reflected off inner surfaces of the hollow component to be discharged from an upper opening. The outer component surface is configured to reflect light from the surrounding LEDs in azimuthal and circumferential directions towards a region below the upper opening. In this manner, plural LEDs are used to form a wide angle emission pattern suitable for use in conventional light bulb replacement devices.

Abstract: Embodiments of the present invention include apparatuses, systems and methods for multi-patch based super-resolution from a single video frame. Such embodiments include a scale-invariant self-similarity (SiSS) based super-resolution method. Instead of searching HR examples in a database or in LR image, the present embodiments may select the patches according to the SiSS characteristics of the patch itself, so that the computational complexity of the method may be reduced because there is not any search involved. To solve the problem of lack of relevant examples in natural images, the present embodiments may employ multi-shaped and multi-sized patches in HR image reconstruction. Additionally, embodiments may include steps for a hybrid weighing method for suppressing artifacts. Advantageously, certain embodiments of the method may be 10˜1,000 times faster than the example based SR approaches using patch searching and can achieve comparable HR image quality.

Abstract: A content distribution method with broadcast encryption, comprising an encryption process that includes the computation of a ciphertext using a differential ciphertext generation method. The ciphertext needs to be recomputed whenever the subscriber set changes. The differential ciphertext generation method computes the new ciphertext by reusing previously preserved computational results of a previous ciphertext, thereby improving the efficiency of the system. A content distribution method with broadcast encryption also comprises a decryption process that includes the reconstruction of the encryption secret that is used for decrypting the encrypted content. A wide window point addition method is used in the encryption secret reconstruction. The wide window point addition method reuses previously preserved computational results of group-divided point additions of public parameters, thereby improving the efficiency of the system.

Abstract: The present invention discloses a non-contact measurement system for measuring the three-dimensional (3D) shape of an object rapidly by using a unique light pattern and the implementation method thereof. The system comprises a pattern generation unit, a projection unit, a sensing unit and a processing unit. The pattern generation unit generates an enhanced color sequence according to predetermined rules. The sensing unit of the system comprises a hybrid sensor which can be operated in fast mode or precise mode. A dedicated decoding method for the present invention is also disclosed.

Abstract: The present invention relates to a device with portions of the device on plural substrate surfaces. The device includes a low resistivity substrate having first and second surfaces with a first electrically-conductive device component disposed over a first surface. An intermediate electrically-insulating layer may be disposed between the electrically-conductive component and the low resistivity substrate. A second electrically-conductive component is disposed over the second surface of the low resistivity substrate. A cavity formed in the low resistivity substrate is at least partially filled with a high resistivity material. One or more electrically-conducting pathways are formed in the high resistivity material electrically connecting the first electrically conductive component and the second electrically-conductive component to form a device. Exemplary devices include inductors, capacitors, antennas and active or passive devices incorporating such devices.

Abstract: An electro-static-discharge (ESD) protection circuit is a power clamp between a high-voltage power supply VDDH and a ground. The power clamp protects high-voltage transistors in a first core and low-voltage transistors in a second core using a low-voltage clamp transistor. The low-voltage transistors have lower power-supply and snap-back voltages than the high-voltage transistors. Trigger circuits are triggered when an ESD pulse is detected on VDDH. One trigger circuit enables a gate of the low-voltage clamp transistor. A series of diodes connected between VDDH and a drain of the clamp transistor prevents latch up or snap-back during normal operation. During an ESD pulse, the series of diodes is briefly bypassed by a p-channel bypass transistor when a second trigger circuit activates an initial trigger transistor which pulses the gate of the p-channel bypass transistor low for a period of time set by an R-C network in the second trigger circuit.

Abstract: The present invention relates to a method and apparatus for channel temporal correlation estimation and MIMO mode selection. An embodiment of the invention under LTE system utilizes SRS symbols for temporal correlation estimation and performs MIMO mode selection based on the said temporal correlation estimation.

Abstract: This invention describes method and apparatus for automatic gain control (AGC) for a TD-LTE system, taking into consideration the TD-LTE frame structure. In one embodiment, an AGC method comprises: adjusting RF gain for subframe j (where 0<=j<=9) in a radio frame according to an average peak signal power of subframe j in previous radio frames when a terminal is lack of information in downlink timing and in uplink/downlink configuration; computing a first average signal power in one or more downlink subframes as received from at least one base station when the terminal has information in downlink timing but is lack of information in uplink/downlink configuration; and computing a second average signal power in one or more downlink subframes as received from at least one base station when the terminal has information in downlink timing and in uplink/downlink configuration.

Abstract: A charge/discharge protection circuit protects a battery from inadvertent shorting on a charger node that can connect to a charger or to a power supply of a portable electronic device. A single n-channel power transistor has a gate that controls a channel between the battery and the charger node. The gate is connected to the charger node by a gate-coupling transistor to turn off the power transistor, providing battery isolation. The gate is driven by a voltage-boosted clock through a switch activated by an enable signal. The enable signal also activates a grounding transistor to ground a gate of the gate-coupling transistor. A comparator compares voltages of the charger and battery nodes, and the compare output is latched to generate the enable signal. An inverse enable signal activates a second switch that drives the voltage-boosted clock to the gate of the gate-coupling transistor to turn off the power transistor.

Abstract: An equalized-impedance shadowed current cell can be arrayed in a Digital-to-Analog Converter (DAC) or other converters or applications. The Equalized-impedance shadowed current cell has primary differential transistors in parallel with shadow differential transistors that have gates driven inversely to gates of the primary differential transistors. A shadow current from the shadow differential transistors is much smaller than a primary current switched by the primary differential transistors. Cell current is not switched off to zero but to the shadow current. The ON state and OFF state impedances of the current cell may be matched during circuit design so that the impedance is the same regardless of digital input values. The Width and Length of the shadow differential transistors are adjusted so that overall output impedances for the ON and OFF states of the current cell are matched. Since output impedance is input code independent, high-speed performance is improved.

Abstract: A two-stage op amp has a transconductance cell in a second stage modified to match a transconductance cell in a first stage. A transconductance swap network is inserted between transconductance cells and trans-impedance cells, such as current-steering networks, current mirrors, or drivers connected to the transconductance cells. The transconductance swap network directly connects the first transconductance cell to the first stage trans-impedance cell during a second clock phase, but crosses-over the first transconductance cell to the second-stage trans-impedance cell during a first clock phase. A first switched-capacitor network drives the gates of differential transistors in the first transconductance cell by alternately sampling an input and feedback, and equalizing to reset inputs. A second first switched-capacitor network drives differential transistors in the second transconductance cell, but during opposite clock phases.

Abstract: A two-stage op amp has a transconductance cell in a second stage modified to match a transconductance cell in a first stage. A transconductance swap network is inserted between transconductance cells and trans-impedance cells, such as current-steering networks, current mirrors, or drivers connected to the transconductance cells. The transconductance swap network directly connects the first transconductance cell to the first stage trans-impedance cell during a second clock phase, but crosses-over the first transconductance cell to the second-stage trans-impedance cell during a first clock phase. A first switched-capacitor network drives the gates of differential transistors in the first transconductance cell by alternately sampling an input and feedback, and equalizing to reset inputs. A second first switched-capacitor network drives differential transistors in the second transconductance cell, but during opposite clock phases.

Abstract: A standoff range, sense-through-obstruction radar system is capable of detecting micro- Doppler, or life form signatures, and movements through obstructions at stand-off ranges and displaying the target information over a live video feed of the area under surveillance. The sense-through-obstruction radar system comprises an antenna assembly that includes a horn antenna and a reflector configured to reflect radio frequency (RF) energy to/from the horn antenna. An antenna pointing assembly supports the antenna assembly. The antenna pointing assembly is configured to move the antenna assembly to point the antenna assembly toward an obstruction. A sensor assembly is mounted to the antenna assembly so that the sensor assembly is aligned with the RF beam formed from the RF energy reflected from the reflector to the horn antenna. The sensor assembly is configured to detect the location of the obstruction and to provide information to assist pointing of the antenna assembly toward the obstruction.

Abstract: The present invention relates to a semiconductor device packaged at the wafer level such that an entire packaged device is formed prior to separation of individual devices. The semiconductor device package includes a semiconductor chip having one or more bonding pads associated with the chip and a protective layer bonded over the semiconductor chip. An insulation layer is positioned on at least side edges and a lower surface of the semiconductor chip. Interconnection/bump metallization is positioned adjacent one or more side edges of the semiconductor chip and is electrically connected to at least one bonding pad. A compact image sensor package can be formed that is vertically integrated with a digital signal processor and memory chip along with lenses and a protective cover.

Abstract: The subject matter disclosed herein relates to an imaging device including an epoxy reservoir and a number of features to facilitate alignment of components during assembly of the imaging device.

Abstract: The subject matter disclosed herein relates to an imaging device having a small form factor.

Abstract: This invention discloses a lighting device for providing an illumination with enhanced color uniformity. The lighting device includes a light generating element adjacent a substrate and configured to produce light having wavelengths substantially within a first wavelength range; a transparent frame attached to the substrate, surrounding the transparent frame; a wavelength converting layer for converting a portion of the light produced by the light generating element into light having wavelengths within a second wavelength range, substantially covering the light emitting surface and at least part of the transparent frame; and a scattering frame configured to substantially scatter light that travels therein, covering a portion of the light emitting surface around periphery thereof to thereby receive a portion of the light leaving the wavelength converting layer around the periphery of the light emitting area. Light components in said portion of the light are substantially mixed in the scattering frame.