Abstract: Methods and systems for mapping computer code to wires and gates are disclosed. An example method may include acquiring a code written in a programming language and generating, based on the code, a finite state machine (FSM). The method may further include generating, based on the FSM, a wires and gates representation, the wires and gates representation including a plurality of wires and a plurality of combinatorial logics. The method may further include configuring, based on the wires and gates representation, a field-programmable gate array. Input of each of the plurality of wires may represent a symbol selected from a set of symbols of a structured data packet. The size of the symbol can be equal to a number of bits of the structured data packet transferred per a clock cycle according to a data transmission protocol.

Abstract: Methods and systems for compiling codes from programming languages into programming languages are disclosed. An example method may include acquiring a first code written in a first language. The method allows generating, based on the first code, a first deterministic finite state machine (DFSM). The method includes optimizing the first DFSM to obtain a second DFSM. The method includes generating, based on the second DFSM, a second code. The second code can be written in a second language. Generating the first DFSM includes parsing the first code into a first abstract syntax tree (AST), translating the first AST into a first non-deterministic finite state machine (NFSM), and converting the first NFSM into the first DFSM. Generating the second code includes translating the second DFSM into a second NFSM, translating the second NFSM into a second AST, and recompiling the second AST into a second code.