Patents Assigned to Arizona Digital, Inc.
  • Publication number: 20140265709
    Abstract: The present invention relates to the field of electrical power generators. Structures of the present invention involve the use of steered flux and comprise uniquely simplified and efficient structures, including rotors free of windings and magnets, and stators with coils encircling, not individual stator poles, but multiple poles or the rotor itself. Magneto Motive Force used with the present invention can be provided by either self-bias or external-bias, including superconducting magnets. The present invention may involve the use of unipolar flux. The many embodiments of the present invention capitalize on innovative approaches to and reconfigurations of electrical power generation principles and structures.
    Type: Application
    Filed: March 6, 2014
    Publication date: September 18, 2014
    Applicant: Arizona Digital, Inc.
    Inventor: Andrew Berding
  • Publication number: 20030160635
    Abstract: A backplane of a data processing system is configured to include a current boost circuit for each net. The boost circuit is coupled to a common point for the net and is triggered to provide a boost current in response to a detected change in a signal on the net. The boost circuit has the capacity to provide a considerably larger drive current than does the conventional driver on the circuit board connected to the backplane. Thus when a conventional driver starts to drive a signal on the net from one logic state to the other, the boost circuit detects the initiation of change and supplies a boost current to cause a rapid change in logic state. Preferably each terminal on the net is coupled to the common point by a trace which includes both a highly conductive portion and a portion including a damping impedance. The damping impedance is chosen to approximate the characteristic impedance of the trace coupling the terminal to the common point and the associated loading of that trace.
    Type: Application
    Filed: January 21, 2003
    Publication date: August 28, 2003
    Applicant: Arizona Digital, Inc.
    Inventor: Andrew R. Berding
  • Patent number: 6512396
    Abstract: A backplane of a data processing system is configured to include a current boost circuit for each net. The boost circuit is coupled to a common point for the net and is triggered to provide a boost current in response to a detected change in a signal on the net. The boost circuit has the capacity to provide a considerably larger drive current than does the conventional driver on the circuit board connected to the backplane. Thus when a conventional driver starts to drive a signal on the net from one logic state to the other, the boost circuit detects the initiation of change and supplies a boost current to cause a rapid change in logic state. Preferably each terminal on the net is coupled to the common point by a trace which includes both a highly conductive portion and a portion including a damping impedance. The damping impedance is chosen to approximate the characteristic impedance of the trace coupling the terminal to the common point and the associated loading of that trace.
    Type: Grant
    Filed: May 28, 1999
    Date of Patent: January 28, 2003
    Assignee: Arizona Digital, Inc.
    Inventor: Andrew R. Berding
  • Patent number: 5930119
    Abstract: A data processing system includes a backplane and a plurality of logic boards connected to the backplane by a plurality of connectors. A set of common points is electrically coupled to the connectors by individual conductive traces between each common point and the corresponding pins of the connectors. The inductance of longer traces is reduced by merging traces near a central portion of the backplane to form a conductive region that extends to at least one connector on either side of the common points, thereby electrically shortening the longer traces. The inductance is further reduced by widening the longer traces. Longer traces are wider than shorter traces to reduce the differences in the LC products associated with each trace and, therefore, the differences in delay among the traces.
    Type: Grant
    Filed: February 26, 1998
    Date of Patent: July 27, 1999
    Assignee: Arizona Digital, Inc.
    Inventor: Andrew R. Berding
  • Patent number: 5696667
    Abstract: A data processing system includes a backplane and a plurality of logic boards connected to the backplane by a plurality of connectors. In one embodiment of the invention, a set of common points is electrically coupled to the connectors by individual conductive traces between each common point and the corresponding pins of the connectors. The common points are preferably centrally located among the plurality of connectors to reduce propagation delay. A connector can be attached at the common points. The traces are separated from each other by lateral displacement in a single plane. If the backplane is a multi-layered printed circuit board, the traces are separated from each other by vertical displacement between the layers of the printed circuit board or by both vertical and horizontal displacement. The traces to the connectors nearest the common points have a minimum length greater than the distance between the nearest connectors and the common points.
    Type: Grant
    Filed: April 15, 1996
    Date of Patent: December 9, 1997
    Assignee: Arizona Digital, Inc.
    Inventor: Andrew R. Berding