Patents Assigned to ARM, Inc.
  • GRAPHICS PROCESSING SYSTEMS
    Publication number: 20160093088
    Abstract: A graphics processing pipeline comprises a tessellation stage 10 operable to tessellate a patch representing some or all of an object to be rendered, so as to generate positions for a set of vertices for one or more output primitives, and a primitive assembly stage 20 operable to assemble one or more output primitives for processing using the positions for a set of vertices generated by the tessellation stage and pre-defined information defining the connectivity between at least some of the vertices of the set of vertices.
    Type: Application
    Filed: September 29, 2014
    Publication date: March 31, 2016
    Applicant: ARM, INC.
    Inventor: David Robert Shreiner
  • Memory cells for read only memories
    Patent number: 8106463
    Abstract: A ROM memory cell has significantly less total area than previously known ROM memory cells. Instead of using only one layer in the manufacturing process to program the memory cells, at least two layers are used to program the memory cells. This flexibility allows the memory cell to be reduced in area, which in turn produces a ROM that is more area efficient and consequently lower in cost. As the bitline length and capacitance are reduced, the speed and power consumption are also improved.
    Type: Grant
    Filed: December 6, 2005
    Date of Patent: January 31, 2012
    Assignee: ARM, Inc.
    Inventors: Sudhir S. Moharir, Zhigeng Liu