Patents Assigned to Array Analysis, Inc.
  • Patent number: 5068814
    Abstract: A human interactive adaptive inference system for testing electric or electronic devices or assemblies. The system includes a testing mechanism for performing position-dependent, time-ordered tests upon electrical or electronic devices or assemblies. The testing mechanism provides a test data array. The testing mechanism has manually provided test parameters and is adapted to operate under at least one of a plurality of operating modes. A reference array is also provided to contain acceptable data for comparison with test data. A reference comparator is connected to the test data array and to the reference array for providing a diagnostic analysis of the electrical or electronic device or assemblies.
    Type: Grant
    Filed: November 7, 1989
    Date of Patent: November 26, 1991
    Assignee: Array Analysis, Inc.
    Inventors: William D. Stark, Gregory C. Prestas
  • Patent number: 5046034
    Abstract: An adaptive inference system for testing electrical or electronic devices or assemblies. A mechanism is provided for performing position-dependent, time-ordered tests upon electrical or electronic devices in order to obtain a test data array. A mechanism is also provided to define a reference array containing acceptable data for comparison with test data. A comparator is connected to the test data array and to the reference array for providing an error array. An error array library is also provided, which contains accumulated error data. Finally, an error array comparator is connected between the error array library and the error array providing a diagnostic analysis of the electrical or electronic devices or assemblies.
    Type: Grant
    Filed: November 7, 1989
    Date of Patent: September 3, 1991
    Assignee: Array Analysis, Inc.
    Inventors: William D. Stark, Gregory C. Prestas
  • Patent number: 5043987
    Abstract: A method for using an adaptive inference system to detect and locate faults in an electrical or electronic device or assembly. The steps include performing a position-dependent, time-ordered test upon an electrical or electronic device or assembly to provide comprehensive error analysis. The error analysis includes a library of error information. Previously unobserved faults can be detected and located despite their possible remoteness within the device or assembly. When detected faults are compared with error library, a figure of merit is calculated for all possibilities of detected faults.
    Type: Grant
    Filed: November 7, 1989
    Date of Patent: August 27, 1991
    Assignee: Array Analysis, Inc.
    Inventors: William D. Stark, Gregory C. Prestas
  • Patent number: 5020011
    Abstract: An adaptive inference system for testing electrical or electronic devices or assemblies. A method is provided for coordinating testing operations in a graphical test sequence presented upon a time dependent display. The method includes the steps of displaying the test data and information along the time dependent axis of a display screen using colored highlighting to identify regions of interest, using next fault searches to automatically locate highlighted areas and using windows positioned alongside data and channel labels along the time dependent axis for initiating an operation or test routine in the graphical test sequence.
    Type: Grant
    Filed: November 7, 1989
    Date of Patent: May 28, 1991
    Assignee: Array Analysis, Inc.
    Inventors: William D. Stark, Gregory C. Prestas
  • Patent number: 5001714
    Abstract: A method of using an adaptive inference system to detect and locate faults in an electrical or electronic device or assembly. A position-dependent, time-ordered test is performed upon the device or assembly to provide a comprehensive error analysis. The error analysis includes an array of error data and information that is time interdependent. Once fault data is stored in memory, a newly-detected fault can be compared with the stored faults. A relationship between the stored fault data and the detected fault is determined. The system indicates the cause of the detected fault to the operator based on stored fault data that is most probably related to the detected fault. Possibilites of faults within the device or assembly are then displayed. This system analysis and range of potential causes can be evaluated by an operator.
    Type: Grant
    Filed: November 7, 1989
    Date of Patent: March 19, 1991
    Assignee: Array Analysis, Inc.
    Inventors: William D. Stark, Gregory C. Prestas