Patents Assigned to ARS Electronics Co., Ltd.
  • Patent number: 6724083
    Abstract: A semiconductor package production method in which the semiconductor package is produced by having via holes for electrically connecting top and bottom surfaces of a double-sided copper clad substrate and cutting the substrate. The production method includes the steps of: forming wiring patterns between the top and bottom surfaces of the double-sided copper clad substrate; forming via holes each connecting the top and bottom surfaces of the substrate; attaching semiconductor chips on the wiring patterns; sealing an entire body of the substrate with resin; and cutting the substrate on a line which separates the via hole into half, thereby separating the semiconductor packages from one another. Each via hole has an oval shape in top view which is created by forming two or more circular holes partially overlapped with one another on a horizontal surface of the substrate.
    Type: Grant
    Filed: March 11, 2003
    Date of Patent: April 20, 2004
    Assignee: ARS Electronics Co., Ltd.
    Inventors: Tsutomu Ohuchi, Fumiaki Kamisaki
  • Publication number: 20030173664
    Abstract: A semiconductor package and its production method in which the semiconductor package is produced by having via holes for electrically connecting top and bottom surface of a double-sided copper clad substrate and cutting the substrate at a line separating the via holes into half. The semiconductor package is produced by forming a plurality of wiring patterns on the double-sided copper clad substrate in a matrix fashion, forming via holes for interconnecting the top and bottom sides of the double-sided copper clad substrate at the ends of each semiconductor package wherein the via hole has a long hole shape so that the via hole is shared by adjacent semiconductor packages, attaching semiconductor chips on predetermined positions on the wiring patterns and wiring the chips with terminals, sealing an entire body of the substrate with resin, and cutting the substrate on a line which vertically separates the via hole into half.
    Type: Application
    Filed: March 11, 2003
    Publication date: September 18, 2003
    Applicant: ARS Electronics Co., Ltd.
    Inventors: Tsutomu Ohuchi, Fumiaki Kamisaki
  • Patent number: 6566747
    Abstract: A semiconductor package and its production method in which the semiconductor package is produced by having via holes for electrically connecting top and bottom surface of a double-sided copper clad substrate and cutting the substrate at a line separating the via holes into half. The semiconductor package includes a plurality of wiring patterns on the double-sided copper clad substrate, via holes for interconnecting the top and bottom sides of the substrate and having a long hole shape so that the via hole is shared by adjacent semiconductor packages when the substrate is cut and separated, semiconductor chips mounted on predetermined positions on the substrate, and resin for sealing an entire body of the substrate.
    Type: Grant
    Filed: July 16, 2001
    Date of Patent: May 20, 2003
    Assignee: ARS Electronics Co., Ltd.
    Inventors: Tsutomu Ohuchi, Fumiaki Kamisaki