Abstract: A motor system includes a brushless direct current motor, voltage divider circuits, a switch and an analog-to-digital converter. The brushless direct current motor includes 3 sets of windings, one set of windings being floating during each commutation. There are 3 voltage divider circuits, and each voltage divider circuit includes a first resistor, a second resistor and a bypass diode. The first resistor includes a first terminal coupled to the set of floating windings. The second resistor includes a first terminal coupled to the first resistor, and a second terminal coupled to the switch to receive a control voltage at the second terminal of the second terminal or grounding the second terminal of the second terminal. The bypass diode is coupled in parallel to the first resistor. The analog-to-digital converter receives a divided back-electromotive force signal to determine back-electromotive force zero crossing, so as to perform the commutation.

Abstract: This disclosure relates to a system that synchronizes the presentation of medical images in multiple contexts and methods thereof. The system includes a variety of contexts that display medical images, and the contexts are connected by communication channels. When a user edits or otherwise interacts with one of the contexts, a message is sent to other contexts via the communication channels, and the other contexts can adjust their presentation of medical images to achieve synchronization.

Abstract: An MRI image processing and analysis system may identify instances of structure in MRI flow data, e.g., coherency, derive contours and/or clinical markers based on the identified structures. The system may be remotely located from one or more MRI acquisition systems, and perform: error detection and/or correction on MRI data sets; segmentation; visualization of flow superimposed on anatomical structure, quantification; verification; and/or generation of patient specific 4-D flow protocols. A protected health information (PHI) service is provided which de-identifies medical study data and allows medical providers to control PHI data, and uploads the de-identified data to an analytics service provider (ASP) system. A web application is provided which merges the PHI data with the de-identified data while keeping control of the PHI data with the medical provider.

Abstract: Computed Tomography (CT) and Magnetic Resonance Imaging (MRI) are commonly used to assess patients with known or suspected pathologies of the lungs and liver. In particular, identification and quantification of possibly malignant regions identified in these high-resolution images is essential for accurate and timely diagnosis. However, careful quantitative assessment of lung and liver lesions is tedious and time consuming. This disclosure describes an automated end-to-end pipeline for accurate lesion detection and segmentation.

Abstract: An MRI image processing and analysis system may identify instances of structure in MRI flow data, e.g., coherency, derive contours and/or clinical markers based on the identified structures. The system may be remotely located from one or more MRI acquisition systems, and perform: error detection and/or correction on MRI data sets (e.g., phase error correction, phase aliasing, signal unwrapping, and/or on other artifacts); segmentation; visualization of flow (e.g., velocity, arterial versus venous flow, shunts) superimposed on anatomical structure, quantification; verification; and/or generation of patient specific 4-D flow protocols. A protected health information (PHI) service is provided which de-identifies medical study data and allows medical providers to control PHI data, and uploads the de-identified data to an analytics service provider (ASP) system. A web application is provided which merges the PHI data with the de-identified data while keeping control of the PHI data with the medical provider.

Abstract: A rotational speed estimation method for an incremental encoder includes generating a plurality of pulse signals according to a plurality of square waves, detecting a time duration when the pulse signals reach a predetermined amount, and generating a rotational speed of a disc according to the predetermined amount, the time duration, and the total number of pulses corresponding to one rotation of the disc of the incremental encoder.

Abstract: An MRI image processing and analysis system may identify instances of structure in MRI flow data, e.g., coherency, derive contours and/or clinical markers based on the identified structures. The system may be remotely located from one or more MRI acquisition systems, and perform: error detection and/or correction on MRI data sets (e.g., phase error correction, phase aliasing, signal unwrapping, and/or on other artifacts); segmentation; visualization of flow (e.g., velocity, arterial versus venous flow, shunts) superimposed on anatomical structure, quantification; verification; and/or generation of patient specific 4-D flow protocols. A protected health information (PHI) service is provided which de-identifies medical study data and allows medical providers to control PHI data, and uploads the de-identified data to an analytics service provider (ASP) system. A web application is provided which merges the PHI data with the de-identified data while keeping control of the PHI data with the medical provider.

Abstract: A glitch-free clock switching circuit with clock loss tolerance and an operation method thereof and a corresponding glitch-free clock switching device are provided. The glitch-free clock switching circuit includes a first and a second stuck-status detection circuits, a first and a second reset synchronizers and a glitch-free switching core circuit. The glitch-free switching core circuit performs clock switching according to a clock switching signal to switch an output clock of the glitch-free clock switching circuit from an original clock source to a target clock source, where the original clock source and the target clock source represent one and the other of a first clock source and a second clock source, respectively; wherein the glitch-free clock switching circuit performs the clock switching based on a first synchronized reset signal and a second synchronized reset signal to provide the clock loss tolerance.

Abstract: Systems and methods for providing improved eddy current correction (ECC) in medical imaging environments. One or more of the embodiments disclosed herein provide a deep learning-based convolutional neural network (CNN) model trained to automatically generate an ECC mask which may be composited with two-dimensional (2D) scan slices or four-dimensional (4D) scan slices and made viewable through, for example, a web application, and made manipulable through a user interface thereof.

Abstract: Techniques to leverage computer monitor and graphics card hardware capabilities, using DCI-P3 and rec2020 color spaces for medical imagery are provided. The technique involves downloading the original raw source pixel data from the medical image from the webserver to the browser. A window and level transform is then applied to the raw pixel data enabling it to be displayed using the web browser capable of leveraging the hardware capabilities of commodity monitors and video cards that are capable of high bit depth display.

Abstract: A method for performing firmware update in an electronic device and a micro control unit equipped with a firmware update function are provided. The method includes: after system reset of the micro control unit, executing an upgrade guiding procedure in an upgrade guiding procedure region by default to start controlling upgrade of a main function procedure in a main function procedure region; checking whether upgrade request information exists, in order to generate a first checking result; in response to the upgrade request information, performing firmware update on multiple sub-regions of the main function procedure region, respectively, to generate an updated main function procedure; performing at least one checking operation to generate at least one checking result; and in response to the at least one checking result, starting executing the updated main function procedure in the main function procedure region.

Abstract: A controller for controlling an electric motor module equipped with incremental encoder and operation method thereof are provided. The controller includes a quadruple frequency circuit, a driver circuit, a non-volatile memory (NVM) and a multi-phase control circuit. The multi-phase control circuit can perform multi-phase control with aid of the NVM, for example: reading an offset counter value from the NVM; executing an initial angle estimation procedure, generating an initial counter value according to an estimated initial angle and the offset counter value, and starting utilizing the driver circuit to directly control the electric motor to start with the estimated initial angle and utilizing a counter to perform counting operations; calculating a counter value error and clear the current counter value to be zero; and performing compensation corresponding to a predetermined compensation times count according to the counter value error, respectively, to control the rotor to reach a target angle.

Abstract: A system and method for adding interface protection to an electronic design using parameters. The electronic design and interface protection scheme are defined as parameters. An interface protection model creates interface protection implementation parameters that describe the implementation details of the interface protection. A hardware description model uses the electronic design parameters and the interface protection implementation parameters to create a hardware description. The interface protection scheme can be a built-in protection scheme, a user defined scheme, a scheme that includes place holders that the user may define later, and a combination of the preceding. The interface protection scheme may contain components to help with the retiming of the description of hardware.

Abstract: A glitch-free clock switching circuit with clock loss tolerance and an operation method thereof and a corresponding glitch-free clock switching device are provided. The glitch-free clock switching circuit includes a first and a second stuck-status detection circuits, a first and a second reset synchronizers and a glitch-free switching core circuit. The glitch-free switching core circuit performs clock switching according to a clock switching signal to switch an output clock of the glitch-free clock switching circuit from an original clock source to a target clock source, where the original clock source and the target clock source represent one and the other of a first clock source and a second clock source, respectively; wherein the glitch-free clock switching circuit performs the clock switching based on a first synchronized reset signal and a second synchronized reset signal to provide the clock loss tolerance.

Abstract: An MRI image processing and analysis system may identify instances of structure in MRI flow data, e.g., coherency, derive contours and/or clinical markers based on the identified structures. The system may be remotely located from one or more MRI acquisition systems, and perform: error detection and/or correction on MRI data sets; segmentation; visualization of flow superimposed on anatomical structure, quantification; verification; and/or generation of patient specific 4-D flow protocols. A protected health information (PHI) service is provided which de-identifies medical study data and allows medical providers to control PHI data, and uploads the de-identified data to an analytics service provider (ASP) system. A web application is provided which merges the PHI data with the de-identified data while keeping control of the PHI data with the medical provider.

Abstract: Computed Tomography (CT) and Magnetic Resonance Imaging (MRI) are commonly used to assess patients with known or suspected pathologies of the lungs and liver. In particular, identification and quantification of possibly malignant regions identified in these high-resolution images is essential for accurate and timely diagnosis. However, careful quantitative assessment of lung and liver lesions is tedious and time consuming. This disclosure describes an automated end-to-end pipeline for accurate lesion detection and segmentation.

Abstract: A system, and corresponding method, is described for correcting an uncorrectable error in a coherent system. The uncorrectable error is detecting using an error detecting code, such as parity or SECDED. The cache controller or agent calculates a set of possible addresses. The directory is queried to determine which one of the set of possible addresses is the correct address. The agent and/or cache controller is updated with the correct address or way. The invention can be implemented in any chip, system, method, or HDL code that perform protection schemes and require ECC calculation, of any kind. Embodiments of the invention enable IPs that use different protections schemes to reduce power consumption and reduce bandwidth access to more efficiently correct errors and avoid a system restart when an uncorrectable error occurs.

Abstract: In accordance with various aspects of the invention, a recall transaction is issued if a tag filter entry needs to be freed up for an incoming transaction. Directory entries chosen for a recall transaction are pushed into a fully associative structure called victim buffer. If this structure gets full, then an entry is selected from entries inside the victim buffer for the recall.

Abstract: A resistor-capacitor (RC) oscillator with shared circuit architecture includes a current mirror circuit, a comparator circuit, a bias voltage generator, and a clock buffer. The current mirror circuit utilizes a plurality of transistors to perform current control, to adjust a second current on a second current path according to a first current on a first current path. The comparator circuit includes a first transistor, a second transistor, a resistor, and a capacitor, wherein a comparison result signal generated by the comparator circuit corresponds to a voltage of the capacitor. The bias voltage generator generates a bias voltage as a comparator reference voltage between the first transistor and the resistor. The clock buffer buffers the comparison result signal to generate an output signal. The bias voltage generator at least shares the resistor with the comparator circuit, and the RC oscillator may achieve targets of low cost and high performance.

Abstract: An analog-to-digital converter (ADC) device equipped with a conversion suspension function and an associated operation method thereof are provided. The ADC device includes: an interleaved clock controller, arranged to generate a first clock signal and a second clock signal according to a master clock signal; and a multi-ADC circuit, coupled to the interleaved clock controller, arranged to perform analog-to-digital conversion. The multi-ADC circuit includes a first ADC and a second ADC, wherein the first ADC performs sampling and conversion operations according to the first clock signal, and the second ADC performs sampling and conversion operations according to the second clock signal. Based on the timing control of the first clock signal and the second clock signal, when any ADC of the first ADC and the second ADC is performing a sampling operation, the other ADC of the first ADC and the second ADC suspends conversion.