Abstract: In accordance with various aspects of the invention, a recall transaction is issued if a tag filter entry needs to be freed up for an incoming transaction. Directory entries chosen for a recall transaction are pushed into a fully associative structure called victim buffer. If this structure gets full, then an entry is selected from entries inside the victim buffer for the recall.

Abstract: A system, and corresponding method, is described for finding the optimal or the best set of routes from a master to each of its connected slaves, for all the masters and slaves using an interconnect, such as a network-on-chip (NoC). Some embodiments of the invention apply to a class of interconnects that utilize a two-dimensional mesh topology, wherein a set of switches are arranged on a two-dimensional grid. Masters (initiators or sources) inject data packets or traffic into the interconnect. Slaves (targets or destinations) service the data packets or traffic traveling through the interconnect. The interconnect includes switches and links that are part of a path. Additionally, one or more optimal routes, which is defined by the system, move the traffic in a way that avoids deadlock scenarios.

Abstract: A buffered switch system for end-to-end data congestion and traffic drop prevention. More specifically, and without limitation, the various aspects and embodiments of the invention relates to the management of buffered switch to prevent the balancing act of buffer sizing, latency, and traffic drop.

Abstract: A quality of service (QoS) management system and guarantee is presented. The QoS management system can be used for end to end data. More specifically, and without limitation, the invention relates to the management of traffic and priorities in a queue and relates to grouping transactions in a queue providing solutions to queue starvation and transmission latency.

Abstract: A system and method for soft locking for a networking device in a network, such as a network-on-chip (NoC). Once a soft lock is established, the port and packet are given transmitting priority so long has the port has an available packet or packet parts that can make forward progress in the network. When the soft lock port's packet parts are not available, the networking device may choose another port and/or another packet. Any arbitration scheme may be used. Once the packet (or all the packet parts) has completed transmission, the soft lock is released.

Abstract: Systems and methods are disclosed that implement a tool for executing performance-aware topology synthesis of a network, such as a network-on-chip (NoC). The tool is provided with network information. The tool uses the network information to automatically determine data width and clock speed for each element in the network that meet the network's constraints and performance requirements. The tool is able to provide the performance-aware topology synthesis rapidly, while honoring the objectives and the network's constraints.

Abstract: An initial Network on Chip (NoC) topology based on a set of initial requirements is incrementally modified to satisfy a set of different requirements. Each incremental modification includes minimizing a number of changes to existing components in the initial topology. Minimizing the changes includes preserving names of the existing components in the initial NoC topology.

Abstract: Systems and methods are disclosed for broadcasting transactions, inside a network-on-chip (NoC), from a master to multiple slaves and for receiving responses. The transactions originate from a master and are send, using the NoC, to broadcast adapters using a special range of addresses. The broadcast adapters receive the transactions from the master. The broadcast adapters duplicate the transactions and send the duplicated transaction to multiple slaves. The slaves send a response, which is transported back by the NoC to the corresponding master.

Abstract: In accordance with the various aspects and embodiment of the invention, a system and method are disclosed that automate the process of generating protocol converters using machine-readable descriptions of the external hardware components interfaces and the associated protocol. One advantage of the invention is lowered mistakes in generating the protocol converters. Another advantage is increased productivity when designing the interconnect, such as a network-on-chip (NoC) interconnect used in a system-on-chip (SoC).

Abstract: A distributed system implementation for cache coherence comprises distinct agent interface units, coherency controllers, and memory interface units. The agents send requests in the form of read and write transactions. The system also includes a memory that includes coherent memory regions. The memory is in communication with the agents. The system includes a coherent interconnect in communication with the memory and the agents. The system includes a second identical coherent interconnect in communication with the memory and the agents. The system also includes a comparator for comparing at least two inputs, the comparator is in communication with the two coherent interconnects.

Abstract: A system, and corresponding method, is described for finding the optimal or the best set of routes from a master to each of its connected slaves, for all the masters and slaves using a Network-on-Chip (NoC). More precisely, some embodiments of the invention apply to a class of NoCs that utilize a two-dimensional mesh topology, wherein a set of switches are arranged on a two-dimensional grid. Masters (initiators or sources) inject data packets or traffic into the NoC. Slaves (targets or destinations) service the data packets or traffic traveling through the NoC. The NoC includes switches and links. Additionally, the optimal routes defined by the system includes moving the traffic in a way that avoids deadlock scenarios.

Abstract: In accordance with various embodiments and aspects of the invention, systems and methods are disclosed that can automatically find the best legal configuration that will be optimal with respect to a given set of requirements or metrics, such as: area, timing, and power. A designer defines the metrics or requirements, which represent the functional needs. A designer typically selects a set of parameters from a group of parameters available to user, which are user selectable parameters. The best parameters, from which the user can select parameters, are identified, and provided to the user. A constraint solver module ensures all rules are enforced and finds all legal parameters that fulfil the user intent. The constraint solver module generates configurations that meet the requirements and are legal configurations.

Abstract: A tool is disclosed that includes a discriminant module. The discriminant module finds one configuration, which is selected from many different possible and legal configurations, that is optimal. The optimal configuration is translated into a set of optimized parameters (identified from the library of parameters that the user can select from) and provided to the designer. The designer reviews (and can manually revise or change) the optimized parameters. The optimized parameters are translated into engineering parameters. The engineering parameters are passed, as an input, to the RTL generation module. The RTL generation module produces the RTL description of the hardware function that is optimal and meets the designer's defined requirements.

Abstract: A system, and corresponding method, is described for updating or calculating ECC where the transaction volume is significantly reduced from a read-modify-write to a write, which is more efficient and reduces demand on the data access bandwidth. The invention can be implemented in any chip, system, method, or HDL code that perform protection schemes and require ECC calculation, of any kind. Embodiments of the invention enable IPs that use different protections schemes to reduce power consumption and reduce bandwidth access to more efficiently communicate or exchange information.

Abstract: A system and method for generating a context block using system parameters. The system parameters include objective parameters, functionality parameters, and interface definitions. Context field definitions are received. The system parameters and context fields definitions may be used to determine context fields and context entries. The system parameters may be used to determine context fields and number of context entries. The context module hardware description may be created using context fields, number of context entries, and context field definitions.

Abstract: A system and method for soft locking on an ingress port of a networking device in a network, such as a network-on-chip (NoC). Once a soft lock is established, the port is given transmitting priority so long has the port has an available packet or packet parts that can make forward progress in the network. When the soft lock port's packet parts, which can make forward progress in the network, are not available, the networking device may choose another port. The system transmits packet parts from the other port until the soft locked port has packet parts available that can make forward progress in the network. Any arbitration scheme may be used to select the port that is soft locked and to select the other ports to transmit from when the soft locked port does not have packet parts that can make forward progress in the network. Once the packet (or all the packet parts) on the soft locked port has completed transmission, the soft lock of the soft locked port is released.

Abstract: A system and methods of use for a broadcast switch system, broadcast management switching system, and methods of use in network-on-chip are presented. The invention relates generally to broadcasting transactions in a network-on-chip (NoC). More specifically, and without limitation, the invention provides for transacting from master to multiple slaves and for receiving responses. The invention relates to a broadcast switch for broadcasting transactions. More specifically, and without limitation, the invention relates to a broadcast switch system, broadcast management switching system, and methods of use in NoC.

Abstract: A buffered switch system, data loss and latency management system, and methods of use are presented. The disclosure provides, generally, a buffered switch system for end to end data congestion and traffic drop prevention. More specifically, and without limitation, the various aspects and embodiments of the invention relates to the management of buffered switch. More specifically, and without limitation, the various aspects and embodiments of the invention relates to the management of buffered switch to prevent the balancing act of buffer sizing, latency, and traffic drop.

Abstract: In accordance with various embodiments and aspects of the invention, systems and methods are disclosed that can automatically find the best legal configuration that will be optimal with respect to a given set of requirements or metrics, such as: area, timing, and power. A designer defines the metrics or requirements, which represent the functional needs. A designer typically selects a set of parameters from a group of parameters available to user, which are user selectable parameters. The best parameters, from which the user can select parameters, are identified, and provided to the user. A constraint solver module ensures all rules are enforced and finds all legal parameters that fulfil the user intent. The constraint solver module generates configurations that meet the requirements and are legal configurations.

Abstract: A quality of service (QoS) management system and guarantee is presented. The QoS management system can be used for end to end data. More specifically, and without limitation, the invention relates to the management of traffic and priorities in a queue and relates to grouping transactions in a queue providing solutions to queue starvation and transmission latency.