Patents Assigned to Asahi Kasei Microdevices Corporation
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Publication number: 20150143145Abstract: When an amount of a change of a temperature sensor output value is greater than a threshold, the occupation ratio is updated. When the amount of the change of the temperature sensor output value is equal to or smaller greater than the threshold, the occupation ratio is not updated and the background temperature is updated by using the occupation ratio at the time one sampling period before. When a difference between the temperature sensor output value and the background temperature calculated in this way becomes equal to or smaller than a threshold for an absence stated determination, it is determined an user is in an absence state.Type: ApplicationFiled: July 12, 2013Publication date: May 21, 2015Applicant: ASAHI KASEI MICRODEVICES CORPORATIONInventors: Kyoya Nakamikawa, Masaya Yamashita
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Patent number: 9034709Abstract: A method for manufacturing a semiconductor device, includes forming a first gate oxide film in each of a first region and a second region by thermally oxidizing a silicon substrate, forming a CVD oxide film on the first gate oxide film, implanting fluorine into each of the first region and the second region through the CVD oxide film and the first gate oxide film, removing the CVD oxide film from the first gate oxide film in the second region, removing the first gate oxide film from the second region, and forming a second gate oxide film in the second region by thermally oxidizing the silicon substrate.Type: GrantFiled: February 20, 2013Date of Patent: May 19, 2015Assignee: Asahi Kasei Microdevices CorporationInventors: Shogo Katsuki, Toshiro Sakamoto
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Publication number: 20150130388Abstract: The present disclosure relates to controllers of linear motion devices and control methods of the same, in particular, to a controller of a linear motion device and a control method of the same capable of controlling the position of the linear motion device accurately, in a case where a misalignment of the mounting position of a magnetic sensor or a magnetizing variation of a magnet occurs, or in a case where a magnetic field detected by the magnetic sensor receives an interference of the magnetic field generated by a driving coil of the linear motion device.Type: ApplicationFiled: May 8, 2013Publication date: May 14, 2015Applicant: ASAHI KASEI MICRODEVICES CORPORATIONInventor: Takashi Fukushima
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Patent number: 9021879Abstract: An inertia force sensor that shortens a time from power activation until inertia force can be detected includes an oscillator, an oscillation circuit unit, and a detection circuit unit. The oscillation circuit unit functions as a closed loop self oscillation circuit with the oscillator as a resonant element, and includes a CV conversion circuit converting a monitor signal based on electrostatic capacitance according to an oscillating state of oscillator into a monitor signal based on a voltage corresponding to an amount in change of the electrostatic capacitance, and an automatic gain control circuit controlling gain based on the monitor signal converted at the CV conversion circuit to generate a driving signal, and supplying the driving signal to the oscillator. The CV conversion circuit includes an amplifier that amplifies a monitor signal with an amplification factor for a predetermined period after power activation.Type: GrantFiled: August 8, 2012Date of Patent: May 5, 2015Assignees: Murata Manufacturing Co., Ltd., Asahi Kasei Microdevices CorporationInventors: Yoshitaka Kato, Akira Mori, Makoto Narita
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Publication number: 20150115937Abstract: A Hall resistance measurement unit measures a Hall resistance value in two or more current directions between a plurality of terminals of the Hall element. A Hall electromotive force measurement unit measures the Hall electromotive force of the Hall element. A temperature measurement unit measures an operating temperature of the Hall element. A compensation signal generation unit compensates the Hall electromotive force on the basis of the Hall resistance value from the Hall resistance measurement unit and a temperature output value from the temperature measurement unit. A compensation coefficient calculation circuit calculates a compensation coefficient on the basis of the Hall resistance value measured by the Hall resistance measurement unit and the temperature output value measured by the temperature measurement unit. The compensation coefficient includes a mechanical stress compensation coefficient and a temperature compensation coefficient.Type: ApplicationFiled: May 31, 2013Publication date: April 30, 2015Applicant: ASAHI KASEI MICRODEVICES CORPORATIONInventors: Taisuke Fujita, Shigeki Okatake
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Patent number: 9019016Abstract: There are provided an accumulator-type fractional N-PLL synthesizer for suppressing the fractional spurious caused by periodically switching a frequency division number of a fractional frequency divider, and a control method thereof. In an accumulator-type fractional N-PLL synthesizer (100), a pulse signal proportional to a fractional phase error occurring between a reference signal and an output signal of a fractional divider (112) for feeding back an output of a VCO (115) of an output stage to a preceding stage is generated using an error signal from an accumulator (120). Through the use of the pulse signal, pulse widths of a UP signal and a DN signal output from a phase detector (140) are controlled so as to reduce a fractional phase error occurring between the UP signal and the DN signal. Thus, the fractional spurious caused by periodically switching the frequency division number of the fractional divider (112) is suppressed.Type: GrantFiled: May 11, 2012Date of Patent: April 28, 2015Assignee: Asahi Kasei Microdevices CorporationInventor: Eizo Ichihara
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Patent number: 9003884Abstract: An oscillation type inertia force sensor includes an oscillator, an oscillation circuit unit, and a detection circuit unit. The oscillation circuit unit functions as a self oscillation circuit of a closed loop with the oscillator as a resonant element, and includes an AGC circuit. The AGC circuit includes a VGA circuit, a comparison circuit comparing a predetermined reference voltage with a voltage of the monitor signal to output a control signal based on the compared result, and a pulse width modulation circuit modulating the control signal to a pulse width modulation signal. Based on the pulse width modulation signal, the driving signal is modulated with the output of the VGA circuit switched between an ON state and OFF state to control the degree of the amplification factor of the VGA circuit.Type: GrantFiled: August 8, 2012Date of Patent: April 14, 2015Assignees: Murata Manufacturing Co., Ltd., Asahi Kasei Microdevices CorporationInventors: Yoshitaka Kato, Akira Mori, Makoto Narita, Yoshihiko Koizumi
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Patent number: 8987145Abstract: A two-layered polysilicon capacitive element is manufactured to enable suppression of both of an increase in the applied electric field dependence of the capacitance value and the initial defect of the dielectric film. Included are a lower electrode into which phosphorous ions are implanted, a dielectric film formed on the lower electrode, and an upper electrode formed on the dielectric film. The dielectric film includes a thermal oxide film formed by partially oxidizing a polysilicon film constituting the lower electrode and etching out its outer layer part, and a deposited oxide film formed on the thermal oxide film.Type: GrantFiled: March 2, 2012Date of Patent: March 24, 2015Assignee: Asahi Kasei Microdevices CorporationInventor: Kotaro Nagakura
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Patent number: 8988159Abstract: There is provided an oscillator capable of lowering the power supply voltage without degrading the phase noise, while employing the conventional circuit configuration. According to one aspect of the present invention, there is provided an oscillator comprising: an oscillation circuit; a bias generation circuit for generating a bias signal to drive the oscillation circuit; and a booster circuit for boosting a power supply voltage to generate a boosted voltage for driving the bias generation circuit. In addition, the oscillation circuit, the bias generation circuit, and the booster circuit are provided in a single IC chip, and the booster circuit may receive the power supply voltage VDD from the power supply arranged at the exterior of the IC chip.Type: GrantFiled: November 12, 2012Date of Patent: March 24, 2015Assignee: Asahi Kasei Microdevices CorporationInventor: Haruhiko Maru
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Patent number: 8963750Abstract: There is described a time-to-digital conversion scheme using an arrangement of delay elements based Time-to-Digital Converter, TDC (20), wherein dithering is built in the digital domain and introduced in the analog domain as a modulation of a supply voltage (TDC-supply) supplying delay elements of the TDC, each having a propagation delay which exhibits a dependency to their supply voltage.Type: GrantFiled: April 22, 2014Date of Patent: February 24, 2015Assignee: Asahi Kasei Microdevices CorporationInventors: David Canard, Julien Delorme
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Patent number: 8963545Abstract: The present invention relates to a magnetic sensor that provides the sensitivity adjustment on a wafer and that has a superior mass productiveness and a small characteristic variation. The magnetic sensor includes a magnetic sensitive portion provided on a substrate that is made of a compound semiconductor and that has a cross-shaped pattern. This magnetic sensitive portion includes input terminals and output terminals. At least one of input terminals of the input terminal is series-connected to a trimming portion having a compound semiconductor via a connection electrode. By performing laser trimming on the trimming portion series-connected via the connection electrode to the magnetic sensitive portion while performing a wafer probing (electric test), the adjustment of the constant voltage sensitivity is provided.Type: GrantFiled: June 29, 2010Date of Patent: February 24, 2015Assignee: Asahi Kasei Microdevices CorporationInventor: Satomi Watanabe
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Patent number: 8957804Abstract: The successive approximation A/D converter includes: switch groups 105—1 to 105—x each of which is connected to the other end of each corresponding capacitor of capacitors 106—1 to 106—x to selectively switch a capacitor to be applied to a successive comparison in response to a switch group control signal Ct1; a comparator 104 for making a successive comparison of a comparison voltage VSN based on a holding voltage on each corresponding capacitor, selected through the switch groups from among the capacitors, with a predetermined reference voltage VC in synchronization with a timing control signal CLK to obtain a judgment output according to the comparison result; and a voltage application part 107 for applying a predetermined voltage to the comparison voltage based on a form-of-voltage application control signal Ct2 for a predetermined period when a predetermined time has elapsed after the successive comparison.Type: GrantFiled: October 22, 2013Date of Patent: February 17, 2015Assignee: Asahi Kasei Microdevices CorporationInventor: Junya Nakanishi
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Publication number: 20150028216Abstract: The light receiving device of the present invention includes a circuit pattern including first and second light receiving parts and first and second output terminals, each of the first and second light receiving parts having a semiconductor layered part forming a photodiode structure having first and second conductivity type semiconductor layers, and first and second electrodes respectively connected to the first conductivity type semiconductor layer and the second conductivity type semiconductor layer, wherein the first electrodes of the first and second light receiving parts are connected to each other, the second electrode of the first light receiving part is connected to the first output terminal, the second electrode of the second light receiving part is connected to the second output terminal, and a difference between signals generated in the first and second light receiving parts are output between the first and second output terminals.Type: ApplicationFiled: March 28, 2013Publication date: January 29, 2015Applicant: ASAHI KASEI MICRODEVICES CORPORATIONInventor: Edson Gomes Camargo
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Patent number: 8942621Abstract: There is provided a circuit for adjusting phases of IQ local signals. As to a local signal A and a local signal B generated by a local signal generating unit for the purpose of generating IQ quadrature local signals, the local signal B in which the gain is adjusted is added to the output of the local signal A to obtain the local signal A2, and the local signal A in which the gain is adjusted is subtracted from the output of the local signal B to obtain the local signal B2. Even if the phase relationship between the local signal A and the local signal B deviates from 90 degrees, the phase difference between the local signal A2 and the local signal B2 can be adjusted with ease by changing the adjustment amounts of variable amplifiers AMP1 and AMP2.Type: GrantFiled: March 28, 2011Date of Patent: January 27, 2015Assignee: Asahi Kasei Microdevices CorporationInventor: Takeji Fujibayashi
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Publication number: 20150015729Abstract: There is provided a position detection apparatus that includes an autofocus mechanism and an optical image stabilization mechanism by using a closed loop control, in which a magnet is commonly used as an autofocus magnet and an optical image stabilization magnet to achieve downsizing. The position detection apparatus includes the autofocus mechanism that moves a lens along an optical axis (Z axis) of the lens, and the optical image stabilization mechanism that moves the lens in a direction orthogonal to the optical axis. A permanent magnet is secured to the lens, and moves according to the movement of the lens. The amount of movement thereof is detected by position sensors. The permanent magnet for autofocus used in the autofocus mechanism and the permanent magnet for optical image stabilization used in the optical image stabilization mechanism is provided in the vicinity of the lens for common use.Type: ApplicationFiled: May 31, 2013Publication date: January 15, 2015Applicant: ASAHI KASEI MICRODEVICES CORPORATIONInventor: Arata Kasamatsu
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Patent number: 8928375Abstract: A phase-locked loop device is configured to manage a transition from a relaxation-oscillation mode to a random noise operation mode. It is designed for progressively reducing proportional and integral coefficients that are implemented in a loop filter of the PLL device. Recovering the last values formerly used for the proportional and integral coefficients is also provided, in case the PLL lock state is lost. Such transition management may be combined with using a voltage-controlled oscillator within the PLL device, which has several control inputs.Type: GrantFiled: April 18, 2014Date of Patent: January 6, 2015Assignee: Asahi Kasei Microdevices CorporationInventor: David Canard
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Patent number: 8929480Abstract: There is provided a transmitter with a small area and low noise. A direct RF modulation transmitter is constituted by an N-number of input signal delay-attached direct RF converters to which an I digital baseband signal is input, an M-number of input signal delay circuit-attached direct RF converters (DDRCs) to which a Q digital baseband signal is input, a Divide-by-2 divider for generating a differential local signal differing in phase by 90 degrees, an output matching circuit, and a delay control circuit for controlling an input data delay amount for the DDRCs. This transmitter sets delay amounts for the DDRCs using the delay control circuit independently. Particularly when N is set to equal M and the same amount of delay is set for N-number of converters corresponding to the I digital baseband signal and the Q digital baseband signal, noise reduction effect in a predetermined frequency band is heightened.Type: GrantFiled: May 23, 2012Date of Patent: January 6, 2015Assignee: Asahi Kasei Microdevices CorporationInventor: Shuichi Fukuda
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Patent number: 8928417Abstract: A phase frequency detector realizes a highly linear conversion from noise-shaped ?? modulation into charge quantities without degradation of phase-locked loop (PLL) phase noise. The phase frequency detector may feature a construction of an Up signal output and a Down signal output, in which the Up signal rises when a divided VCO input rises, an Up signal falls when the divided VCO input falls, a Down signal rises when the divided VCO input rises, and a Down signal falls when a reference input rises. A mode selection input may be utilized for a fast lock-up PLL.Type: GrantFiled: May 7, 2012Date of Patent: January 6, 2015Assignee: Asahi Kasei Microdevices CorporationInventor: David Canard
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Publication number: 20140375295Abstract: A DC-DC converter includes: an error amplifier for outputting an error between an output voltage and a predetermined voltage; a phase compensation impedance element for accumulating the error across one end to generate an error phase; a determination unit for determining whether the voltage output by the error amplifier is higher, or lower than a reference voltage that is consonant with the predetermined voltage, and outputting a determination signal indicating determination results; and a voltage setting unit for setting a voltage for one end of the phase compensation impedance element higher than a lower output voltage limit for the error amplifier when the determination signal indicates that the voltage output by the error amplifier is lower than the reference voltage, or for canceling setting of the voltage when the determination signal indicates that the voltage output by the error amplifier is higher than the reference voltage.Type: ApplicationFiled: April 26, 2013Publication date: December 25, 2014Applicant: Asahi Kasei Microdevices CorporationInventor: Satoru Ito
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Publication number: 20140375311Abstract: The present invention relates to a magnetic sensor and a magnetic detecting method. A first arrangement pattern includes: a first magnetic detection unit (201) including a magnetic sensitivity material (201a) and a magnetic convergence material (201b) having a length different from a length of the magnetic sensitivity unit on a substrate, and being arranged to be parallel to the substrate and arranged horizontally so that a median line (Ma) passing through a midpoint of the magnetic sensitivity material in a longitudinal direction and a median line (Mb) of the magnetic convergence material in the longitudinal direction do not cross with each other; a second magnetic detection unit (202) having the structure same as the structure of the first magnetic detection unit; and a connecting unit electrically connecting the magnetic sensitivity material of the first magnetic detection unit in series with a magnetic sensitivity material of the second magnetic detection unit.Type: ApplicationFiled: February 6, 2013Publication date: December 25, 2014Applicant: ASAHI KASEI MICRODEVICES CORPORATIONInventors: Hironori Ishii, Hiromi Fujita