Abstract: A spread spectrum clock generator is provided which improves the spread spectrum effect with little increasing the circuit cost by modifying the shape of a triangular wave used for frequency modulation by a simple method. The output signal of the modulation waveform generating circuit has such a modulation waveform as indicated by solid lines in FIG. 2A. The modulation waveform is input to a VCO (voltage-controlled oscillator). In response to the modulation waveform, the oscillation frequency of the VCO is modulated, and the output clock that varies its frequency as illustrated in FIG. 2B is obtained. The frequency transition of the output clock involves such temporal variations as indicated by solid lines in FIG. 2C.

Abstract: A multi-channel TV sound signal decoding circuit for decoding multi-channel TV sound signals according to BTSC system specification, and a multi-channel TV sound decoder comprising such circuitry.

Abstract: Power converters employing extrapolative conductance mode (ECM) control utilize periodic current sampling and employ an extrapolation method to determine charge pulse duration. In preferred embodiments, the operating frequency of the converter is altered in response to current sample perturbations to dissipate sub-harmonic oscillations associated with duty cycles of 50% or greater without the use of slope correction. High current monitor signal-to-noise ratios may be achieved in conjunction with low power losses, and a first order output filter response may be obtained for duty cycles greater than 50%.

Abstract: A mark S/H circuit (66) samples, for example, a signal A generated as a photodetector (20) detects a return beam from marks of an optical disk (10), a space S/H circuit (68) samples a signal A generated through detection of a return beam from spaces, and amplifiers (70 and 72) justify amplitudes of the sampled A signals from the marks and spaces. A mark/space selector switch (74) selects alternately and combines the mark and space signals whose amplitudes have been justified. After A, B, C, and D signals A1 to D1 are subjected individually to a series of processes up to the combination process, a wobble processing circuit (80) adds them in predetermined combinations, finds differences among the added signals after justifying the amplitudes of the added signals, and thereby reproduces a wobble signal (107).

Abstract: A Hall device of the present invention includes a cross-shaped magnetometric sensing surface, a pair of power terminal portions and a pair of output terminal portions. The surface is formed of a rectangular and mutually opposed extensions provided on each side of the rectangular. The pair of power terminal portions is provided on a pair of the opposed extensions at the surface. The pair of output terminal portions is provided on another pair of the opposed extensions at the surface. Slits extending in each opposed direction completely split the power portions and the output portions and in partway split each extension at the surface, and each of the slits is provided with a separation layer of an insulator. An outline formed of the surface, the power portions and the output portions is quadrature-symmetrical with the center. The Hall device of this structure is highly sensitive to a magnetic field.

Abstract: A semiconductor laser wavelength control device capable of controlling the optical wavelength constant even if the optical output intensity of the semiconductor laser varies and permitting a reduction in overall size is to be provided. It is provided with control means which controls the optical wavelength of a laser diode 1 to a prescribed wavelength by driving a temperature control unit to control the temperature of the laser diode 1.

Abstract: A waveform generating circuit is provided which generates a modified triangular wave signal suitable for being input to a frequency modulation circuit such as a voltage-controlled oscillator (VCO). The waveform generating circuit includes a triangular generator, an offset generator for generating first and second offset component signals, a combiner for adding the triangular wave signal generated by the triangular wave generator and the offset component signals, and an output for delivering an output signal resulting from the addition by the combiner.

Abstract: A frequency-controllable oscillator, having an oscillation device in which the oscillation frequency is controlled on the basis of a feedback current or voltage; a constant current source circuit; a charge device which charges a capacitor with a constant current from the constant current source circuit on the basis of an oscillation output from the oscillation device; and a control device which generates the current or voltage for control of the oscillation frequency of the oscillation device on the basis of electric charge stored in the capacitor and a predetermined reference value and which includes an integrator formed of an operational amplifier and an integrating capacitor, the Integrator performs integration on the basis of the charged voltage across the capacitor and the predetermined reference value, and the current or voltage for control of the oscillation frequency of the oscillation device is generated on the basis of an integrated output from the integrator.

Abstract: There is provided a digital switching amplifier capable of enhancing an S/N ratio at the time of a small signal output and reducing current consumption and electromagnetic interference (EMI).

Abstract: An amplifier 11 to which transistors 13 and 14 functioning as variable resistors are connected in parallel is used. A burst signal is received by a light receiving element 10 and the received signal is converted into an input current signal Iin. The input current signal Iin is converted in the amplifier 11 into an output voltage Vo. Determination is made in a determining circuit 20 as to whether the output voltage Vo exceeds a current voltage V1 which is a threshold. The result of determination is stored in a register circuit 15. Based on the result of determination outputted from the register circuit 15, a desired voltage is selected from among a number of voltages generated beforehand in a control voltage generating circuit. The selected voltage is used to generate a control voltage Vg1 or Vg2 to be applied to the transistors 13 and 14; and the generated control voltage Vg1 or Vg2 is inputted to the transistor 13 or 14 of the amplifier 11.

Abstract: The present invention is a folded cascode operational amplifier provided with a differential input portion 10, cascode current source portion 20, current mirror portion 30, output portion 40, and differential amplifier 50 serving as a differential amplifying portion. The differential input portion 10 has P-type MOS transistors M2 and M3 of a differential pair for respectively inputting a differential signal and the MOS transistors M2 and M3 are respectively provided with a well terminal. The differential amplifier 50 compares the source voltage of each of the MOS transistors M2 and M3 with a predetermined reference voltage Vref, generates an output voltage in accordance with the comparison result, and supplies the generated output voltage to well terminals as well voltages of the MOS transistors M2 and M3. An operational amplifier is provided which performs the rail-to-rail operation at a low voltage and in which an input current is zero.

Abstract: The oscillation type inertial force sensor includes an oscillator arranged to detect an inertial force, an oscillation circuit unit arranged to drive the oscillator, and a signal processing circuit unit arranged to generate a signal according to the magnitude of the inertial force on the basis of a detection output of the oscillator, and further includes a holding arranged to hold a processed signal in the signal processing circuit unit at a predetermined potential during a period immediately after power-on until operation of the oscillation circuit unit becomes stable in response to power-on.

Abstract: To reduce degradation of image quality when constructing anode line drive circuits in a display panel drive circuit from a plurality of IC chips. Dummy drive output and proper drive output of an adjoining IC chip are switched in predetermined cycles and supplied to an anode line. This makes it possible to reduce variation in adjacent output currents among IC chips. Thus, it is possible to reduce luminance differences in display areas caused by differences in current driving capacity among IC chips and reduce degradation of image quality when an anode line drive circuit is constructed from a plurality of IC chips.

Abstract: A system and method for reducing fan noise by controlling the drive current to the fan motor. In one embodiment the system approximates a linear drive using a number of transistors in parallel and sequentially deploying the transistors. In another embodiment, a scheme is used to activate and deactivate transistors in discrete steps thereby achieving the benefits of the linear controller topology.

Abstract: In a slew rate limiter, a slew rate is limited so as not to pass a signal varying more abruptly than a wobble signal included in a difference signal generated by a differential amplifier, and this limited slew rate is used to process the difference signal to be outputted. That is, the slew rate limiter removes a signal varying more abruptly than a wobble signal included in a difference signal DIFO, and then outputs only the wobble signal. A DAC generates an offset voltage. An adder is used to add this offset voltage to the wobble signal from the slew rate limiter. The signal obtained by this addition as a slice level is compared by a comparator with the difference signal, thereby reproducing an LPP signal.

Abstract: Values of control signals 61, 62, 63, . . . , 6n, each inputted to an input terminal for operation control 6 of each of transistor elements 4 constituting a variable resistance portion 2, are controlled based upon an input signal 40 and offset signals 52, 53, . . . , 5n generated by an offset provision portion 3. Thus, a ratio of the maximum resistance value to the minimum resistance value can be made large, while using a limited power supply voltage range as a control range.

Abstract: A delay circuit according to embodiments of the present invention capable of operating over a wide range of frequencies is presented. Embodiments of the invention minimize or eliminate parasitic capacitance at the output terminals that arise from switching elements used to selectively add capacitive elements to the circuit to vary the operating frequency range. A ring oscillator using embodiments of the delay circuit according to the present invention is also presented. A sequence of an integral number of delay circuits according to the present invention is coupled in series to form a ring oscillator. In some embodiments the delay circuit or a ring oscillator incorporating the delay circuit may be fabricated as an integrated circuit.

Abstract: A system and method for reducing fan noise by controlling the drive current to the fan motor. In one embodiment the system approximates a linear drive using a number of transistors in parallel and sequentially deploying the transistors. In another embodiment, a scheme is used to activate and deactivate transistors in discrete steps thereby achieving the benefits of the linear controller topology.

Abstract: In an LVDS system for converting N types (for example N=3) of parallel signals into serial signals and sending/receiving the converted serial signals between a driver and a receiver through M (M?N) signal lines, a sequencer 11 for selecting drivers 10a to 10c to be used in accordance with the number of signal lines used for transmission/reception and a reception-side sequencer for selecting a receiver to be used in accordance with the number of signal lines M used for transmission/reception are included to perform transmission/reception by using the driver and receiver selected by the both sequencers. Thus, it is possible to select the number of channels and a data rate optimum for the impedance of a signal line without fixing the number of signal lines used for transmission/reception.

Abstract: The output amplitude of a variable gain amplifier is compared with a reference value by a differential amplifier. When the amplitude is less than the reference value, the gain of the variable gain amplifier is increased to augment the output amplitude. When the amplitude is greater than the reference value, the gain of the variable gain amplifier is decreased to reduce the output amplitude. Only part of the variable gain range of the variable gain amplifier is corresponded to the potential at VLP by installing an input switching unit for inverting the output polarity of the differential amplifier, an input switching unit for inverting the output polarity of a differential amplifier, comparator, an IDAC, and a logic circuit for controlling the ON and OFF of switches of the input switching units and the output current value of the IDAC.