Patents Assigned to Asahi Kasei Microsystems Ltd.
  • Patent number: 5729232
    Abstract: A modulator, in conjunction with a load circuit, is provided. The modulator forms part of an A/D converter system. The modulator includes a series of switched capacitors connected in a shared capacitor arrangement. The shared capacitors receive samples from an input signal and, depending upon the logic value fed into a D/A converter, the shared capacitor further receives a feedback reference voltage. The reference voltage is thereby coupled to the switched capacitor network, as well as to a load circuit which cancels data-dependent values modulated upon the reference voltage supply. The load circuit thereby serves to eliminate ac components within the reference voltage supply resulting from data dependent loading.
    Type: Grant
    Filed: April 10, 1996
    Date of Patent: March 17, 1998
    Assignees: Asahi Kasei Microsystems Ltd., Oasis Design, Inc.
    Inventor: Ichiro Fujimori
  • Patent number: 5721547
    Abstract: An analog-to-digital (A/D) converter is provided for converting an analog signal to a digital signal, wherein the digital signal is corrected such that it does not contain DC offset. The A/D converter preferably comprises a delta-sigma modulator and an offset compensation circuit. The offset compensation circuit is coupled to the output of the modulator or, according to another embodiment, to the output of a noise cancellation circuit. The offset compensation circuit can calibrate a single bit output from the modulator or a multi-bit output from the noise cancellation logic. In the former instance, the offset compensation circuit includes an up/down counter and register; in the latter instance, the calibration circuit includes an accumulator. The offset compensation circuit counts or accumulates a digital representation of DC offset.
    Type: Grant
    Filed: January 4, 1996
    Date of Patent: February 24, 1998
    Assignees: Asahi Kasei Microsystems Ltd., Oasis Design, Inc.
    Inventor: Lorenzo L. Longo
  • Patent number: 5654711
    Abstract: An analog-to-digital converter is provided for converting an analog signal to a digital signal and for maintaining a linear gain relationship therebetween, regardless of the analog input signal full scale voltage. The analog-to-digital converter utilizes oversampling and delta-sigma techniques within a cascaded, multiple order circuit arrangement. A local feedback loop is coupled across the output and input nodes of at least one latter order integrator within the first stage and subsequent stage of the cascaded analog-to-digital converter. The local feedback loop monitors the output from the connected integrator and modifies that output through local feedback to ensure the input level of the second and subsequent stages is optimally maintained. Proper scaling of the latter stages ensures that quantization noise caused by the first stage is cancelled, and that any and all direct noise leakage from the first stage does not enter into the digital signal produced by the noise cancellation circuit.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: August 5, 1997
    Assignees: Asahi Kasei Microsystems Ltd., Oasis Design Inc.
    Inventor: Ichiro Fujimori