Abstract: A computer network includes frame- or packet-based subnetworks connected by switches, the switches being interconnected by high-capacity trunks using a connection-based data transfer protocol similar to Asynchronous Transfer Mode (ATM). Some of the trunks include a Permanent Virtual Path (PVP) trunk crossing an ATM core network, the PVP trunk including one or more bidirectional PVPs. A multipoint-to-point (MPT) protocol is used among the switches to transfer packets as groups of cells directly from “leaf”, or source, switches to “root”, or destination, switches without requiring significant routing-related processing during cell transmission.

Abstract: A Route Lookup Engine (RLE) for determining a next hop index is disclosed. The RLE receives a lookup key and performs a multi-bit trie search with prefix expansion and capture of a variable stride trie. The data that the RLE returns comprises the next hop information and status flags. The RLE uses a compact, field reusable data structure. The RLE performs both unicast and multicast IP address lookups on Virtual Private Networks. The RLE uses separate indexing and forwarding memories. The upper bound of the search time for the RLE is fixed regardless of the route table size.

Abstract: A method is presented which allows for the testing and verification of an off-line switch fabric used in network switch having redundant switch fabrics. A special test cell is directed to the off-line switch fabric, loops through a portion of the switching core of the off-line switch fabric, and is returned from the off-line switch fabric. A plurality of test cells can be used to provide full mesh connectivity checking of the off-line switch fabric. Testing is accomplished without need for reconfiguration of the off-line switch fabric, and the off-line switch fabric is available for use immediately upon determination of the need therefor.

Abstract: Packet classification apparatus includes a rule memory and a criterion memory. One type of rule memory entry contains an operator and a pointer to a criterion memory entry. The operator defines a comparison operation to be performed, such as EQUAL (exact match) or LESS THAN. The criterion memory entry contains one or more values to be used as comparands on one side of the comparison, where corresponding values from a received packet appear on the other side of the comparison. Control logic responds to packet classification requests to retrieve a rule memory entry from the rule memory, retrieve the criterion memory entry identified by the criterion memory pointer in the rule memory entry, and perform the operation specified by the operator in the rule memory entry on the values in the criterion memory entry and corresponding values included in the classification request.

Abstract: An explicit rate marking system is disclosed for use in connection with a switching node to generate an explicit rate value for use in a resource management cell associated with a virtual circuit in an ATM network. The explicit rate marking system comprises a virtual bandwidth value generator module and an explicit rate value generator module. The virtual bandwidth value generator module generate a virtual bandwidth value reflecting an available bandwidth capacity value, an explicit rate value associated with each bottlenecked virtual circuit for which the switching node forms part of a path, and a minimum cell rate value associated with each unbottlenecked virtual circuit for which the switching node forms part of a path. The explicit rate value generator module generates the explicit rate value in relation to the virtual bandwidth value and the minimum cell rate value associated with the virtual circuit and other virtual circuits for which the switching node forms part of a path.

Abstract: A method and apparatus for determining the next router that a data packet is transmitted to on its way to a destination host by traversing a routing table using a hardware search engine and a unique search tree. The step of traversing each node in the search tree takes only one memory cycle, decreasing in half the time it takes to search a routing table and thus forward data packets on a system of computer networks. This is accomplished by storing the decision bit for each node in its parent node rather than in the node itself The apparatus may use a hardware search engine to search the routing table.

Abstract: Packet processing logic includes a request queue for receiving lookup requests from a packet processor, where each request includes information elements from a received packet and indicates that a route lookup and a packet classification are to be performed based on the information elements. Both a route lookup engine (RLE) and a packet classification engine (PCE) have respective inputs coupled to the request queue for receiving selected information elements from the requests. Based on the information elements in each request, the RLE searches for forwarding information indicating how the packet corresponding to the request should be forwarded, and the PCE performs a classification process and generates classification information about the packet corresponding to the request. For each request, the forwarding information from the RLE and the classification information from the PCE are combined into a single result stored in a result queue.

Abstract: Port cards in an ATM switch store parameters for virtual channel connections (VCCs) and virtual path connections (VPCs) in separate areas of a virtual connection parameter table (VCPT), the areas being defined by a VCC pointer and a VPC pointer. Also, a number of “free lists” are used to identify unused single locations (for VPCs) or chunks of locations (for sets of VCCs) that are available for re-allocation. Different free lists are used for different-sized sets of VCCs, i.e., sets configured to use different maximum numbers of VCI bits. When a new VPC is created, a VCPT location identified by an entry in the VPC free list is allocated, if such an entry exists. Otherwise a VCPT location is allocated by advancing the VPC pointer. De-allocation of a VPC entry proceeds in reverse order, i.e., the VPC area is shrunk by backing up the VPC pointer if possible, and if not the de-allocated entry is placed on the VPC free list.

Abstract: A method and apparatus for performing logical multicasting within a network switch are disclosed so as to permit a downstream network device to perform cell forwarding in a manner which resembles spatial multicasting. A logical multicast cell has a connection identifier associated with the cell within the switch. The connection identifier is employed to initiate a series of lookup operations to generate unique VPI/VCI addresses which are transmitted out of an output port of the switch as copies or leaves of the multicast cell. Successive look-ups of outgoing VPI/VCI addresses for a logical multicast cell are performed using a chain bit to indicate when all leaves of the cell have been transmitted. Leaves of a logical multicast cell are transmitted to the downstream network device from one output cell buffer of a plurality of output cell buffers associated with the output port of the switch so as to minimize the likelihood of blocking and so as to minimize cell delay variation.

Abstract: An apparatus and method for enabling the combination of multiple streams of data cells into a single thread. By enabling plural input ports of an intermediate device to access a single parallel output port of the device, plural network switch elements share a single thread through a switch fabric. For instance, the method and apparatus permit interleaving the relatively low bandwidth cell outputs of two ATM network switch central control processors onto a single thread routed through an interconnected switch fabric. Certain of these cells are received from the switch fabric at a parallel input of the intermediate device, then routed to one of plural serial output ports. Pacing of cells provided to the plural serial input ports prevents exceeding the shared thread bandwidth.

Abstract: A method and apparatus for performing virtual connection merging in an output port of a network switch are disclosed. In the event no completely assembled packets have been received and scheduled for transmission, a partially received packet is selected for cut-through transmission prior to receipt of all cells comprising the packet. Transmission of the selected packet is initiated and a timer is started. If the timer expires prior to the receipt of an end of packet indication for the packet for which transmission has commenced, and end of packet signal is generated and transmitted and the transmission of additional cells for the cut-through packet is aborted. In this manner, delays associated with packet reassembly may be avoided and buffer sizes of reassembly buffers may be reduced.

Abstract: The present invention is directed to an apparatus and method for efficiently transferring asynchronous transfer mode (ATM) cells across a backplane in a network switch. The present invention is realized through an electrical apparatus that converts parallel data that is received on parallel data input ports to serial data that is transmitted on serial data output ports. The parallel data that is received on each parallel data input port is divided and transmitted from a corresponding pair of serial data output ports. The electrical apparatus also converts serial data that is received on serial data input ports to parallel data that is transmitted on parallel data output ports. The serial data that is received on a corresponding pair of serial data input ports is combined and transmitted from a parallel data output port.

Abstract: A computer network includes frame- or packet-based subnetworks connected by switches, the switches being interconnected by high-capacity trunks using a connection-based data transfer protocol similar to Asynchronous Transfer Mode (ATM). Some of the trunks include a Permanent Virtual Path (PVP) trunk crossing an ATM core network, the PVP trunk including one or more bidirectional PVPs. A multipoint-to-point (MPT) protocol is used among the switches to transfer packets as groups of cells directly from "leaf", or source, switches to "root", or destination, switches without requiring significant routing-related processing during cell transmission.

Abstract: A method and apparatus for allocating and deallocating control blocks for virtual connections in a network telecommunications device allows optimal usage of memory. Lists are maintained within the telecommunications device which identify control blocks as being fully utilized or partially utilized for either an incoming or outgoing connection. New connection requests for a user are handled by utilizing a partially used control block, if available, to avoid the allocation of unused memory resources in partially utilized control blocks.

Abstract: A data communications switch and method of operation are presently disclosed enabling flexible, selectable provision of a common timing signal for synchronized external communication through physical layer interfaces with other network devices, synchronized internal communications within the switch, and for uninterrupted synchronization of such communications. Synchronization of external communications is enabled by programmable selection from among plural potential timing references at redundant timing modules (TMs). An active TM provides a primary external synchronization clock; a standby TM provides a redundant timing function. Both TMs access the same references. A state signal indicates which synchronization clock is active. External interfaces derive timing from this distributed clock. Synchronized internal timing is provided by an internal clock and phase-locked loop (PLL) on each TM. The clock/PLL timing signal output is routed to other switch elements, enabling synchronized internal data transfer.

Abstract: A method and apparatus which reduces flame emissions from an electronics enclosure in the event of a fire within the enclosure. At least one fan is utilized to provide air flow along an air flow path between an air intake port and an air exhaust port of the enclosure. At least one heat sensor, such as a linear heat detector cable, detects an over-temperature condition within air flow path when the temperature in the air flow path exceeds a predetermined threshold temperature. The sensors are coupled to a fan controller. In response to the detection by the controller of the over-temperature condition indicated by one or multiple sensors disposed within the air flow path, the fans are disabled to avoid the fanning of flames within the enclosure and the exhaust of flames from the enclosure.

Abstract: A system and method for remote users to access a private network having a first communications protocol via a public network, such as any TCP/IP network having a second different communications protocol, in a secure manner so that the remote user appears to be connected directly to the private network and appears to be a node on that private network. A host connected to the private network may execute a host software application which establishes and provides a communications path for secure access of the remote client computer. An encrypted data stream may be communicated between the host and the client representing traffic and commands on the network.

Abstract: An apparatus and method for processing a data packet to determine the routing of the data packet through a communications network is provided in which the data packet has a header portion and a data portion. The apparatus stores the header portion of the data packet, and processes the header portion of the data packet. The processing may include using a processing core for executing instructions for processing the header portion, searching through a route table to determine a route of the data packet, and searching through a table memory for information about the destination of the data packet in which the route table search, the table memory search and the processing core operate simultaneously to process the header portion and generate an internal header or a network media header. A modified header portion is generated to route the data packet through the communications network.

Abstract: A module interconnection system which minimizes electronic signal propagation delays is disclosed. The module interconnection system includes a backplane, a first plurality of connectors arranged in a side by side generally parallel arrangement, and a second plurality of connectors arranged in a side by side generally parallel arrangement. In a preferred embodiment, the second plurality of connectors are mounted on the backplane at right angles to the first plurality of connectors so as provide short routing paths between each of the second plurality of connectors and at least one of the first plurality of connectors. Point-to-point signal interconnections are selectively utilized to provide data paths between selected contacts of at least one of the first plurality of connectors and selected contacts of the second plurality of connectors.

Abstract: A card cage for mounting printed circuit cards of at least two sizes is disclosed. The card cage includes an insert removably mounted to a mounting bar position between first and second ends of the card cage. The insert extends along a portion of the width of the card cage. When the insert is mounted to the mounting bar, a printed circuit card of a first length may be disposed between the insert and one of the card cage ends. When the insert is removed, a printed circuit card of a second length greater than the first length may be mounted between the first and second ends of the card cage. Plural mounting bars may be located between the respective card cage ends to accommodate printed circuit cards of different lengths.