Abstract: Method for determining lithographic quality of a structure produced by a lithographic process using a periodic pattern, such as a grating, detects lithographic process window edges and optimum process conditions.
Type:
Application
Filed:
October 30, 2013
Publication date:
October 29, 2015
Applicant:
ASML Nertherlands B.V
Inventors:
Willem Jan GROOTJANS, Henricus Johannes Lambertu MEGENS, Jouke KRIST, Miguel GARCIA GRANDA, Lu XU
Abstract: A method for manufacturing a marker structure including line elements and trench elements arranged in a repetitive order includes filling the trench elements with silicon dioxide and leveling the marker structure. A sacrificial oxide layer is grown on the semiconductor surface, and a first subset of the line elements is exposed to an ion implantation beam including a dopant species to dope and change an etching rate of the first subset. The substrate is annealed to activate the dopant species, and the semiconductor surface is etched to remove the sacrificial oxide layer and to level the first subset to a first level and to create a topology such that the first subset has a first level differing from a second level of a surface portion of the marker structure different from the first subset.
Type:
Grant
Filed:
June 30, 2004
Date of Patent:
September 18, 2007
Assignee:
ASML Nertherlands B.V.
Inventors:
Richard Johannes Franciscus Van Haren, Sanjaysingh Lalbahadoersing, Henry Megens