Patents Assigned to AsusTek Computer Inc.
  • Patent number: 11825333
    Abstract: A method and apparatus are disclosed from the perspective of a network node. In one embodiment, the method includes the network node configuring a UE (User Equipment) with a first DRB (Data Radio Bearer), wherein the first DRB is configured with a presence of SDAP (Service Data Adaptation Control) header and the network node is not allowed to reconfigure the first DRB with an absence of SDAP header before the first DRB is released. The method further includes the network node configuring the UE to serve a first QoS (Quality of Service) flow and a second QoS flow by the first DRB. The method also includes re-configuring the UE to serve the first QoS flow by a second DRB, which was originally served by the first DRB, if the second QoS flow is released or removed from the first DRB, wherein the second DRB is configured with an absence of SDAP header.
    Type: Grant
    Filed: July 22, 2021
    Date of Patent: November 21, 2023
    Assignee: ASUSTek Computer Inc.
    Inventor: Li-Te Pan
  • Patent number: 11825297
    Abstract: A method and apparatus are disclosed. In an example from the perspective of a first User Equipment (UE), the first UE generates a message requesting inter-UE coordination information, wherein the message includes information associated with a first priority value. The first UE generates a Medium Access Control (MAC) Protocol Data Unit (PDU) including the message. The first UE sets a value of a priority field in a first sidelink control information (SCI) based on a second priority value of the message, wherein the second priority value of the message is a configured value and/or a lowest priority value among a defined set of priority values. The first UE transmits the first SCI to one or more UEs including a second UE, wherein the first SCI schedules a first Physical Sidelink Shared Channel (PSSCH) transmission for transmitting the MAC PDU.
    Type: Grant
    Filed: December 27, 2022
    Date of Patent: November 21, 2023
    Assignee: ASUSTek Computer Inc.
    Inventors: Ming-Che Li, Chun-Wei Huang, Yi-Hsuan Kung
  • Patent number: 11822405
    Abstract: The present disclosure provides a power allocating system, including adapters and an electronic device. Each of the adapters includes a processor. The electronic device includes a controller. The controller obtains rated information and current output information from each of the processors to calculate an output utilization rate of each of the adapters. The controller transmits at least one adjusting signal to at least one of the processors according to the output utilization rates to adjust the output utilization rate of the adapters.
    Type: Grant
    Filed: November 26, 2020
    Date of Patent: November 21, 2023
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Tzu-Nan Cheng, Yu-Cheng Shen
  • Patent number: 11818702
    Abstract: A method and apparatus are disclosed. In an example from the perspective of a base station operating with Semi-Persistent Scheduling (SPS) for unicast and multicast, the base station configures a User Equipment (UE) with a unicast SPS operation configuration using a first information element including a sps-Config information element or a sps-ConfigToAddModList information element. The base station determines, based upon whether the first information element includes the sps-Config information element or the sps-ConfigToAddModList information element, whether or not to configure the UE with a multicast SPS operation configuration using a sps-ConfigMulticastToAddModList information element.
    Type: Grant
    Filed: March 23, 2023
    Date of Patent: November 14, 2023
    Assignee: ASUSTek Computer Inc.
    Inventor: Li-Chih Tseng
  • Patent number: 11817951
    Abstract: A method and apparatus are disclosed from the perspective of a transmitting device. In one embodiment, the method includes being configured or allocated with an identity, wherein the identity comprises a first part of the identity and a second part of the identity. The method also includes the transmitting device generating a data packet for sidelink transmission, wherein the data packet includes the second part of the identity. Furthermore, the method includes transmitting device generating a control information associated with the data packet, wherein the control information includes the first part of the identity. The method further includes the transmitting device transmits the control information and the data packet.
    Type: Grant
    Filed: October 19, 2021
    Date of Patent: November 14, 2023
    Assignee: ASUSTek Computer Inc.
    Inventors: Ming-Che Li, Li-Chih Tseng, Wei-Yu Chen, Li-Te Pan
  • Patent number: 11818708
    Abstract: A method and apparatus are disclosed. In an example, a first node may trigger a scheduling request (SR) based upon an expected transmission from a second node which is a child node of the first node. The first node may determine a first SR configuration for the SR from a plurality of SR configurations configured to the first node.
    Type: Grant
    Filed: July 27, 2021
    Date of Patent: November 14, 2023
    Assignee: ASUSTek Computer Inc.
    Inventors: Tun-Huai Shih, Meng-Hui Ou
  • Publication number: 20230362488
    Abstract: A clamping device, an electronic device, and a remote control method of the electronic device. The clamping device includes a clamping unit, a first communication unit, and a control unit. The clamping unit is suitable for clamping the electronic device. The first communication unit is suitable for pairing with a second communication unit of the electronic device. The control unit is coupled to the clamping unit and the first communication unit. When the clamping unit is switched from an off mode to an on mode, the control unit controls the first communication unit to pair with the second communication unit and sends a screen-off command to the second communication unit via the first communication unit after the pairing is completed. When the clamping unit is in a clamping mode, the control unit sends an application open command to the second communication unit via the first communication unit.
    Type: Application
    Filed: October 20, 2022
    Publication date: November 9, 2023
    Applicant: ASUSTeK COMPUTER INC.
    Inventors: Yea-Chin Yeh, Chi-Hwa Ho, Yi-Teng Tsai, Chun-Wei Lu
  • Patent number: 11809227
    Abstract: An electronic device is provided. The electronic device includes a function module, a casing, and a cover. The casing includes a space to accommodate the function module. The cover includes a frame and an extending portion. The frame covers the casing. The extending portion extends outward from a sidewall of the frame to protrude from the casing, and the extending portion and the frame are integrally formed.
    Type: Grant
    Filed: September 7, 2021
    Date of Patent: November 7, 2023
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Yi-Chen Yen, Yung-Hsiang Chen, Hsi-Tan Huang
  • Patent number: 11810739
    Abstract: An electronic device and a knob module thereof are provided. The knob module includes a circuit board, a rotary encoder, a light guide structure, a plurality of light emitting units, and a rotation cover. The rotary encoder is disposed on the circuit board. The light guide structure is disposed on the circuit board. The light guide structure includes a light guide ring and an annular light guide wall. The light guide ring surrounds the rotary encoder. The annular light guide wall extends downward from the light guide ring to abut against the circuit board. The plurality of light emitting units is disposed on the circuit board and located between the annular light guide wall and the rotary encoder for emitting light toward the annular light guide wall. The rotation cover is disposed on the rotary encoder.
    Type: Grant
    Filed: January 5, 2022
    Date of Patent: November 7, 2023
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Chao-Chieh Cheng, Yi-Ou Wang, Jia-Ruei Fang, Chienyi Huang, Chao-Shun Wang
  • Publication number: 20230354534
    Abstract: A PCI-E expansion card module is configured to insert in a slot with a rotation switch. The PCI-E expansion card module includes a PCI-E expansion card body and an unlock mechanism. The PCI-E expansion card body includes an inserting portion and a positioning hook. The unlock mechanism is disposed beside the PCI-E expansion card body, and the unlock mechanism includes a pushing member. When the PCI-E expansion card body is inserted into the slot, the rotation switch is on a moving path of the pushing member. The pushing member moves and pushes the rotation switch to release a limitation of the PCI-E expansion card body.
    Type: Application
    Filed: October 26, 2022
    Publication date: November 2, 2023
    Applicant: ASUSTeK COMPUTER INC.
    Inventors: Xu Wang, Hui He, Wei Tang, Jung-Kai Chang, Yuan-Yu Lin
  • Publication number: 20230350371
    Abstract: A sensing data accessing method and a sensing data accessing system are disclosed. The method includes: activating a shared memory; generating sensing data by a sensor; storing first sensing data among the sensing data to the shared memory and updating an operation state of the shared memory through a sensor interface; in response to an update of the operation state, reading the first sensing data from the shared memory through a software interface; and performing a default operation according to the first sensing data.
    Type: Application
    Filed: October 19, 2022
    Publication date: November 2, 2023
    Applicant: ASUSTeK COMPUTER INC.
    Inventors: Shin-Fu Wu, Hao-Yu Chen
  • Patent number: 11799395
    Abstract: An actuator is provided, including a plurality of conducting layers and a plurality of electret layers. The electret layers are respectively sandwiched between the conducting layers, and form gaps between the conducting layers. Directions of preset electric fields of the adjacent electret layers are opposite, and the adjacent conducting layers are respectively electrically connected to a first voltage end and a second voltage end to receive a driving voltage.
    Type: Grant
    Filed: September 10, 2020
    Date of Patent: October 24, 2023
    Assignee: ASUSTEK COMPUTER INC.
    Inventor: Lai-Shi Huang
  • Patent number: 11797060
    Abstract: An electronic device is provided, which includes a first body, a second body, and a pivot structure connecting the first body and the second body. The pivot structure includes a shaft with an axis, a first assembling element assembled with the shaft and connected with the first body and a second assembling element pivotally connected to the shaft and connected with the second body. The second assembling element includes an abutting portion. When at the first position, the abutting portion and the first assembling element are located on the same side relative to the axis. When at the second position, the abutting portion rotates around the axis and is located on a different side relative to the axis, and the abutting portion abuts the abutting surface to generate an abutting force. Then the first body rises and an angle relative to the abutting surface is generated.
    Type: Grant
    Filed: May 24, 2021
    Date of Patent: October 24, 2023
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Xian Zhong, Shih-Wei Chiu
  • Publication number: 20230336081
    Abstract: A power supply phase doubling system includes a pulse width modulation (PWM) controller and first and second phase doubling chips. The PWM controller outputs a PWM signal. The first phase doubling chip is operated at a power supply voltage and has a first PWM output pin to generate a first control signal and a second control signal according to the PWM signal, and generates a first output signal according to the first control signal. The second phase doubling chip is operated at the power supply voltage, has a second PWM output pin, and is configured to generate a second output signal according to the second control signal. The first and second phase doubling chips are respectively switched between a master mode and a slave mode according to a voltage level of the first PWM output pin and a voltage level of the second PWM output pin.
    Type: Application
    Filed: November 9, 2022
    Publication date: October 19, 2023
    Applicant: ASUSTeK COMPUTER INC.
    Inventors: Wei Kao, Ming-Ting Tsai, Hsiang-Jui Hung, Hsi-Ho Hsu, Chen-Hao Yu, Chun-San Lin, Wei-Gen Chung
  • Patent number: 11785546
    Abstract: A method and apparatus are disclosed. In an example from the perspective of a User Equipment (UE), the UE receives an indication from a base station, wherein the indication is indicative of monitoring a power saving signal in one or more monitoring occasions and at least one monitoring occasion of the one or more monitoring occasions is associated with a Discontinuous Reception (DRX) ON duration and is within Active Time associated with the UE. The UE does not monitor and/or skips monitoring the power saving signal in the at least one monitoring occasion. The UE monitors Physical Downlink Control Channel (PDCCH) during the DRX ON duration.
    Type: Grant
    Filed: September 8, 2022
    Date of Patent: October 10, 2023
    Assignee: ASUSTek Computer Inc.
    Inventor: Ko-Chiang Lin
  • Patent number: 11785191
    Abstract: A projection picture correction system, and an electronic equipment and a projector thereof are provided. The projection picture correction system includes a projector and a processing device. The projector is for providing keystone correction parameters. The processing device connects to the projector through a data transfer interface to receive the keystone correction parameters from the projector, performs a keystone correction on at least one picture according to the keystone correction parameters and generates a corrected picture, and connects to the projector through an image transmission interface to transmit the corrected picture to the projector for projection.
    Type: Grant
    Filed: September 17, 2020
    Date of Patent: October 10, 2023
    Assignee: ASUSTEK COMPUTER INC
    Inventor: Jian-Hui Lee
  • Publication number: 20230319421
    Abstract: An electronic device with a flash function and a driving method of a flash are provided. The electronic device includes a flash, an image sensor, and a processor. The flash has a red light source, a green light source, and a blue light source. The image sensor is configured to obtain a preview image of a current scene and outputting the raw data of the preview image. The processor obtains a red ratio value and a blue ratio value according to the current scene, and the processor determines the green brightness value, red brightness value and blue brightness value according to the red ratio value, the blue ratio value and an exposure sensitivity for obtaining the preview image. The processor drives the flash according to the calculated red brightness value, the calculated green brightness value, and the calculated blue brightness value.
    Type: Application
    Filed: October 27, 2022
    Publication date: October 5, 2023
    Applicant: ASUSTeK COMPUTER INC.
    Inventors: Jo-Fan Wu, Hui-Chi Chuang
  • Patent number: 11778518
    Abstract: A method and apparatus are disclosed from the perspective of a first device for performing sidelink transmission in a sidelink resource pool. In one embodiment, the first device has a configuration of the sidelink resource pool, wherein the sidelink resource pool is enabled with resource reservation for different Transport Blocks (TBs). The first device also has a configuration of a list of reserved periods. Furthermore, the first device selects or determines a first reserved period from the list of reserved periods, wherein the first selected or determined reserved period is within a first set of reserved periods. In addition, the first device randomly selects a first integer in a first interval, wherein the first interval is based on a scaling factor and a second interval, and the scaling factor is derived based on a largest reserved period in the first set of reserved periods, and wherein the first integer indicates a number of transmission opportunities of different TBs with the first reserved period.
    Type: Grant
    Filed: September 15, 2021
    Date of Patent: October 3, 2023
    Assignee: ASUSTek Computer Inc.
    Inventors: Chun-Wei Huang, Ming-Che Li
  • Patent number: 11775028
    Abstract: A foldable electronic device is disclosed and includes a first body, a second body, a hinge mechanism, and a cover. The hinge mechanism includes a first rack plate disposed to the first body, a second rack plate disposed to the second body, a first gear shaft meshed with the first rack plate, and a second gear shaft meshed with the second rack plate and the first gear shaft. The cover is movably disposed on the hinge mechanism and covers the hinge mechanism. When the second body rotates relative to the first body, the second rack plate, the second gear shaft, the first gear shaft and the first rack plate rotate in sequence, the first rack plate and the second rack plate abut against the cover, so the cover is away from the hinge mechanism and separated from the first body and the second body.
    Type: Grant
    Filed: February 9, 2022
    Date of Patent: October 3, 2023
    Assignee: ASUSTeK COMPUTER INC.
    Inventors: Po-Nien Chen, Yi-Ting Chen, Tsung-Ju Chiang
  • Patent number: 11778599
    Abstract: A method and apparatus such as a device to perform sidelink communication including receiving a sidelink grant from a network node, wherein the sidelink grant schedules or assigns multiple sidelink resources, generating a data packet comprising or multiplexing sidelink data from Sidelink (SL) logical channel(s) with SL Hybrid Automatic Request (HARQ) feedback enabled, performing two sidelink transmissions for the data packet on two adjacent, neighbor, or consecutive sidelink resources among the multiple sidelink resources if a time gap of the two adjacent, neighbor, or consecutive sidelink resources is larger than or equal to a minimum time gap, and the device being allowed to drop, skip, or cancel a sidelink transmission on one sidelink resource of the two adjacent, neighbor, or consecutive sidelink resources among the multiple sidelink resources if the time gap of the two adjacent, neighbor, or consecutive sidelink resources is less than a minimum time gap.
    Type: Grant
    Filed: December 13, 2021
    Date of Patent: October 3, 2023
    Assignee: ASUSTek Computer Inc.
    Inventors: Ming-Che Li, Chun-Wei Huang, Li-Chih Tseng