Patents Assigned to Atheros Communications
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Patent number: 7746274Abstract: A local ranging system for use with GPS receivers and GPS enabled devices. A device in accordance with the present invention comprises a Radio Frequency (RF) section, the RF section adaptable to receive at least one GPS signal from at least one GPS satellite, and a baseband section, coupled to the RF section, wherein the baseband section performs calculations to determine a geoposition of the GPS receiver based on the at least one GPS signal, wherein the baseband section further comprises a Pseudo Noise (PN) output.Type: GrantFiled: June 20, 2007Date of Patent: June 29, 2010Assignee: Atheros Communications, Inc.Inventor: Keith J. Brodie
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Patent number: 7742778Abstract: Transient distortion is compensated for by multiplying an exponentially-decaying phase shift onto the distorted waveform. The exponentially decaying phase shift waveform is patterned after the transient which typically takes the form of an exponential and occurs upon introduction of power to a circuit or circuit component. A digital circuit produces an appropriate exponentially-decaying waveform which is used as the input for a look up table whose output is a complex sinusoidal waveform capable of compensating for the distortion. The complex sinusoid is multiplied onto the transmitted waveform. The decaying exponential is biased so that it crosses a threshold at which point the compensating circuitry is turned off.Type: GrantFiled: September 28, 2007Date of Patent: June 22, 2010Assignee: Atheros Communications, Inc.Inventors: Paul J. Husted, Bevan M. Baas
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Patent number: 7728631Abstract: A phase frequency detector comprising a detection circuit and a reset circuit. The phase frequency detector may receive a feedback signal having a predetermined pulse width. The detection circuit may generate a first control signal based on a reference signal, and a second control signal based on the feedback signal. The reset circuit may generate a reset signal used for resetting the detection circuit based on the first control signal, the second control signal, and the feedback signal. The feedback signal may be tied to the generation of the reset signal such that, during a locked state, the pulse width of the second control signal is approximately equal to the pulse width of the feedback signal, which helps reduce the sensitivity of the circuit to nonlinearities.Type: GrantFiled: May 15, 2008Date of Patent: June 1, 2010Assignee: Atheros Communications, Inc.Inventor: Lalitkumar Nathawad
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Patent number: 7728676Abstract: A voltage-controlled oscillator (VCO) comprising a first circuit, a second circuit, a comparator circuit, and a control unit. The first circuit can determine an output common mode voltage associated with an output of the VCO. The second circuit can generate an upper control voltage limit and a lower control voltage limit associated with a control voltage received by the VCO based, at least in part, on the output common mode voltage. The comparator circuit can compare the control voltage to the upper and lower control voltage limits. The control unit can determine whether to change a switched capacitance associated with the VCO based, at least in part, on whether the control voltage is outside the upper and lower control voltage limits, thereby maintaining an optimal region of operation for the control voltage.Type: GrantFiled: April 30, 2008Date of Patent: June 1, 2010Assignee: Atheros Communications, Inc.Inventors: Lalitkumar Nathawad, Justin Hwang
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Patent number: 7729372Abstract: A method and corresponding system for operating in a network in which stations communicate over a shared medium are presented. The shared medium has at least one varying channel characteristic that varies approximately periodically. The method includes providing repeated beacon transmissions from a coordinator station for coordinating transmissions among a plurality of the stations, wherein at least some beacon transmissions are synchronized to the varying channel characteristic; and transmitting from a first station to at least one receiving station during a time slot determined based on at least one of the beacon transmissions received by the first station from the coordinator station.Type: GrantFiled: January 23, 2006Date of Patent: June 1, 2010Assignees: Sharp Corporation, CopperGate Communications Ltd., Atheros Communications, Inc.Inventors: Lawrence W. Yonge, III, Srinivas Katar, James E. Petranovich, Neal Riedel, George M. Peponides, Wai Chung Chan
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Patent number: 7728567Abstract: A method of providing current mode pulse frequency modulation (PFM) for a switching regulator can include resetting a driver input for a fixed duration when a first current in the driver reaches a first value set by an error amplifier output. The first current can be associated with PMOS switching transistors in the driver. The method can also include setting the driver input signal for the same fixed duration when a second current in the driver reaches a second value. This second current can be associated with NMOS switching transistors in the driver. In one embodiment, the driver can be tristated to ignore both the resetting and the setting. Using this method, perturbations of the inductor current can be substantially corrected and have limited impact on the current waveform beyond the cycle in which they occur.Type: GrantFiled: January 26, 2007Date of Patent: June 1, 2010Assignee: Atheros Communications, Inc.Inventor: Michael P. Mack
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Patent number: 7715425Abstract: A method of operating in a network (e.g., a power line communication network) in which a plurality of stations communicate over a shared medium (e.g., an AC power line) having a periodically varying channel. The method includes determining a plurality of channel adaptations (e.g., tone maps) for communication between a pair of stations, and assigning a different one of the plurality of channel adaptations to each of a plurality of phase regions of the periodically varying channel.Type: GrantFiled: February 26, 2004Date of Patent: May 11, 2010Assignee: Atheros Communications, Inc.Inventors: Lawrence W. Yonge, III, Srinivas Katar, Stanley J. Kostoff, II, William E. Earnshaw, Bart W. Blanchard, Hassan Kaywan Afkhamie, Harper Brent Mashburn
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Publication number: 20100111212Abstract: Current OFDM systems use a limited number of symbols and/or sub-channels to provide approximations for channel estimations and pilot tracking, i.e. phase estimations. For example, two training symbols in the preamble of a data packet are used to provide channel estimation. Four of the fifty-four sub-channels are reserved for providing phase estimation. However, noise and other imperfections can cause errors in both of these estimations, thereby degrading system performance. Advantageously, decision feedback mechanisms can be provided to significantly improve channel estimation and pilot tracking in OFDM systems. The decision feedback mechanisms can use data symbols in the data packet to improve channel estimation as well as data sub-channels to improve pilot tracking.Type: ApplicationFiled: January 15, 2010Publication date: May 6, 2010Applicant: Atheros Communications, Inc.Inventors: Qinfang Sun, Won-Joon Choi, Jeffrey M. Gilbert, Ning Zhang, Yi-Hsiu Wang, Tao-Fei Samuel Ng
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Patent number: 7705778Abstract: A satellite navigation receiver having a flexible acquisition and tracking engine architecture. The flexible acquisition engine has a reconfigurable delay line that can be used either as a single entity or divided into different sections. Consequently, it can be configured to search different satellite vehicles, a single Doppler frequency, and full CA code in parallel. When configuring the delay line into different sections, each section is used to search a partial CA code. In this configuration, multiple Doppler mode, multiple satellite vehicles, multiple Doppler frequencies, and partial CA code can be searched in parallel. Furthermore, the different sections of the CA code can be time-multiplexed into a correlator, which can then be over clocked to achieve full CA code correlation. The flexible tracking engine includes a number of parallel tracking channels, whereby each individual channel has a number of taps or fingers, which can be used to lock onto different delays.Type: GrantFiled: October 30, 2008Date of Patent: April 27, 2010Assignee: Atheros Communications, Inc.Inventors: Qinfang Sun, Wen-Chang Yeh
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Patent number: 7693036Abstract: Current OFDM systems use a limited number of symbols and/or sub-channels to provide approximations for channel estimations and pilot tracking, i.e. phase estimations. For example, two training symbols in the preamble of a data packet are used to provide channel estimation. Four of the fifty-four sub-channels are reserved for providing phase estimation. However, noise and other imperfections can cause errors in both of these estimations, thereby degrading system performance. Advantageously, decision feedback mechanisms can be provided to significantly improve channel estimation and pilot tracking in OFDM systems. The decision feedback mechanisms can use data symbols in the data packet to improve channel estimation as well as data sub-channels to improve pilot tracking.Type: GrantFiled: June 10, 2005Date of Patent: April 6, 2010Assignee: Atheros Communications, Inc.Inventors: Qinfang Sun, Won-Joon Choi, Jeffrey M. Gilbert, Ning Zhang, Yi-Hsiu Wang, Tao-Fei Samuel Ng
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Patent number: 7688864Abstract: A system and method are disclosed for dynamic preamble detection. A subset of the bits comprising the synchronization portion of the preamble are decoded, de-scrambled, and analyzed to determine dynamically which preamble format is being used. The source data values for the synchronization bits for a first preamble format are different than the source data values for the synchronization bits for a second preamble format and the receiving system uses the difference to determine which preamble format has been used. The information concerning which format has been used may be used to extend a synchronization operation.Type: GrantFiled: November 17, 2006Date of Patent: March 30, 2010Assignee: Atheros Communications, Inc.Inventors: Chaohuang Zeng, William J. McFarland
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Patent number: 7683829Abstract: A selectable frequency source for use in GPS receivers. A device in accordance with the present invention comprises a reference frequency source, a first divider, coupled to the reference frequency source, the first divider having a first dividing factor, a first mixer, coupled to the first divider, a filter, coupled to the first mixer, a voltage controlled oscillator, coupled to the filter, a second divider, coupled between the voltage controlled oscillator and the first mixer, the second divider having a second dividing factor, and a second mixer, coupled to an output of the voltage controlled oscillator, for mixing a GPS signal with the output of the voltage controlled oscillator, wherein at least one of the first dividing factor and the second dividing factor is changed to change a frequency output of the voltage controlled oscillator.Type: GrantFiled: April 24, 2006Date of Patent: March 23, 2010Assignee: Atheros Communications, Inc.Inventor: Qiang Lin
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Patent number: 7675443Abstract: A method for detecting saturation in a cascaded ?? ADC can include receiving an output of the cascaded ?? ADC, determining a magnitude of the output, and squaring the magnitude. The squared magnitude can be added to a feedback signal, wherein the sum represents a saturation signal. The saturation signal can be filtered and then amplified, wherein the amplified, filtered saturation signal is the feedback signal. The saturation signal can then be compared to a threshold to determine whether the cascaded ?? ADC is in saturation.Type: GrantFiled: June 25, 2008Date of Patent: March 9, 2010Assignee: Atheros Communications, Inc.Inventor: Soner Ozgur
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Patent number: 7675353Abstract: A compact constant current generator that can operate with a positive supply voltage of 1.22 V (or lower) and minimize noise is provided. The constant current generator can include a bandgap reference circuit and a single gain stage. Notably, the bandgap reference circuit can advantageously generate differential node voltages. The gain stage can amplify those differential node voltages and generate a constant current having a temperature coefficient substantially equal to zero. Advantageously, this single gain stage can minimize the number of components, thereby resulting in a compact and efficient current generator.Type: GrantFiled: May 2, 2005Date of Patent: March 9, 2010Assignee: Atheros Communications, Inc.Inventor: Michael Peter Mack
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Patent number: 7672220Abstract: The present invention provides an apparatus and method of multiple antenna receiver combining of high data rate wideband packetized wireless communication signals, where the apparatus includes M receive antennas, receiving M high data rate wideband packetized wireless communication signals, where each of the signals includes N frequency bins. The apparatus, in an exemplary embodiment, includes (1) a joint timing recovery units that perform joint coarse signal timing estimation, joint frequency offset estimation, and joint fine timing estimation on each of the signals, (2) M Fast Fourier Transform units (FFTs) that each convert the digital data for each of the M signals into frequency domain information for each of the N received frequencies and that output Q pilots for each of the signals, where Q is a positive integer, and (3) a combiner that weights and combines the outputs of the M FFTs for each of the N received frequencies.Type: GrantFiled: March 6, 2008Date of Patent: March 2, 2010Assignee: Atheros Communications, Inc.Inventors: Ardavan Maleki Tehrani, Won-Joon Choi, Jeffrey M. Gilbert, Yi-Hsiu Wang
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Patent number: 7669312Abstract: A differential circuit layout can advantageously use step symmetry for inductors and mirror symmetry for the rest of the circuit. Interconnect segments can be used to connect the terminals of the inductors to other components in the circuit. These interconnect segments facilitate the transition from the step symmetry of the inductors to the mirror symmetry of the other components. To provide this transition, the terminals of an inductor and its associated interconnect segments are formed on a middle axis of the inductor. This mixed symmetry can advantageously cancel the common-mode magnetic field, reduce the parasitic inductor coupling, and balance parasitic wiring capacitances between the two sides of the differential circuit.Type: GrantFiled: June 15, 2007Date of Patent: March 2, 2010Assignee: Atheros Communications, Inc.Inventor: Manolis Terrovitis
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Patent number: 7672656Abstract: Systems and methods for passively calibrating and correcting for I/Q mismatch in a quadrature receiver without the necessity of modifying the analog portion of the receiver by adding calibration signals or correction circuitry are presented. The passive I/Q mismatch calibration system proceeds using normally received incoming transmitted data signals to obtain statistical information on which to base I/Q mismatch compensation factors. The I/Q mismatch compensation factors can be used to adjust the magnitude and phase response in the time domain or the frequency domain, the analog or the digital portion of the receiver. Depending on the embodiment, the passive I/Q mismatch calibration system can calibrate frequency dependent gain or magnitude imbalance, frequency independent magnitude imbalance, frequency dependent phase imbalance, and frequency independent phase imbalance or combinations or these.Type: GrantFiled: November 3, 2006Date of Patent: March 2, 2010Assignee: Atheros Communications, Inc.Inventor: Paul J. Husted
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Patent number: 7664955Abstract: A method for establishing shared information is described. The method includes estimating characteristics of a communication channel between two nodes based on signals transmitted between the nodes. The method also includes transmitting a signal from the first node to the second node, the signal being modulated with a first data sequence according to a first estimated characteristic, and transmitting a signal from the second node to the first node, the signal being modulated with a second data sequence according to a second estimated characteristic. Shared information is formed at each of the first and second nodes based on at least a portion of the first data sequence and at least a portion of the second data sequence.Type: GrantFiled: July 10, 2006Date of Patent: February 16, 2010Assignee: Atheros Communications, Inc.Inventors: Richard E. Newman, Lawrence W. Yonge, III
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Patent number: 7660327Abstract: A method of operating in a network in which a plurality of stations communicate over a shared medium (e.g., using a carrier sense multiple access (CSMA) service). The stations contend for access to the shared medium using a contention procedure that relies on a priority level, wherein transmissions with a lower priority level have a reduced chance of gaining access to the shared medium during a contention process. Selected stations are given the capability of temporarily promoting the priority level of transmissions they are attempting to make. The priority level is increased during an interval to reduce the chance that other stations gain access to the shared medium during that interval, and the priority level is restored to its normal level following the interval.Type: GrantFiled: February 3, 2004Date of Patent: February 9, 2010Assignee: Atheros Communications, Inc.Inventors: Srinivas Katar, Lawrence W. Yonge, III
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Patent number: 7642856Abstract: An amplifier can advantageously use a power supply voltage source that provides a voltage greater than all breakdown voltages of the process associated with transistors of the amplifier. Specifically, cascoded configurations can be used to reduce the gate-drain and source-drain voltages of “at-risk” transistors in the amplifier. During a power down mode, a bias shunt of the amplifier can isolate certain nodes from the voltage sources. At the same time, a charge circuit of the amplifier can charge those nodes to a predetermined voltage, thereby minimizing stress to the at-risk transistors during the power down mode. A multi-flavor power down signal generator circuit can advantageously generate the appropriate power down signals for driving various transistors of the amplifier during the power down mode.Type: GrantFiled: May 30, 2006Date of Patent: January 5, 2010Assignee: Atheros Communications, Inc.Inventor: Manolis Terrovitis