Abstract: A localized refrigerator apparatus for a thermal management device includes a chamber having an evaporation portion and a condensation portion. The evaporation portion is adapted to thermally couple to a heat generating device. A fluid housed in the chamber and is adapted to facilitate heat transfer between the evaporation portion and the condensation portion by an evaporation and condensation cycle. The thermal management device also includes a thermoelectric cooler thermally coupled to the condensation portion.

Abstract: The invention synchronizes and mixes multiple streams at different sampling rates by selectively accessing portions of the received streams in a sequence that allows for independent input and output frame rates. The sequence that is used to access the received streams is irregular with regard to the output frames, and formulated such that the input and output frames are synchronized to a super-frame that corresponds to a least common multiple frame in a conventional synchronizing and mixing system.

Abstract: An adaptive speaker compensation system and method, such as for use in a multimedia computer, stores speaker response filter coefficients for each speaker and adaptively compensates received audio for non-linear speaker characteristics based on the stored speaker response filter coefficients. The speaker response filter coefficients preferably represent an inverse response of a speaker response curve for each speaker in the audio system. Preferably a library memory containing prestored speaker characteristic data, such as the speaker response filter coefficients, is selectively accessed by the adaptive speaker compensation system to download the speaker response filter coefficients based on identification of a speaker type and channel for which the speaker is being used.

Abstract: A system, method, and apparatus for compression of video data is presented. The compressed block includes a plurality of offset values, each indicating an offset between a corresponding one among the plurality of pixel values and a reference value. Exemplary methods are described wherein minimum and maximum reference values are derived from the block of pixel values, and a flag associated with each offset value indicates an appropriate reference value. Application of embodiments of the invention to the transfer of depth (Z) information are discussed.

Abstract: A bus interface control system and method includes an on-demand bus master interface for independently requesting multistream data from host memory without interrupting processing of the host processor between independent requests for data packets. A plurality of digital signal processors share the host bus and utilize flexible data speed transfer depending upon demand of real time data that must be transferred from host memory. The master interface control system includes an packet by packet arbitor to facilitate maximum throughput of data on-demand by the plurality of processing unit.

Abstract: A method and apparatus for processing data with improved concurrency that begins when a host processor an application identifies a memory block of a plurality of memory blocks based on memory block status. The application then provides a data block to the memory block. The data block includes data for processing, which includes application data and operating instructions, and a memory block status update command. A data retrieval command and a sequential updating command are provided to a processing entity by the application. The processing entity then retrieves the data block in accordance with the data retrieval command and processes the memory block status update command to produce an updated memory block status. Finally, the processing entity provides the updated memory block status to the application in accordance with the sequential updating command.

Abstract: A video DAC uses a charge pump to maintain a constant peak to peak amplitude within power supply variations over process and temperature, rather than an external reference signal or a band gap reference. The charge pump performs calibration at full scale output during horizontal sync levels or vertical sync pulses.

Abstract: One embodiment of a de-interlacing device has a decoder that extracts decoding motion vector data for use in de-interlacing of decompressed picture data, from an MPEG-2 type compressed data stream containing interlaced decompressed picture data made up of macroblock of data. The de-interlacing device also has a video rendering device for receiving the extracted decoding motion vector data from the decoder. The decoder has a determinator for determining whether the macroblock of data contains motion based on the decoding motion vector data and at least a subset of the block of data. The decoder generates motion vector based de-interlacing information containing information indicating whether each macroblock contains motion or no motion and if desired, a level of confidence that the referenced data is suitable for a particular method of de-interlacing.

Abstract: A system and method for providing channel balancing and room tuning for a multi-channel audio surround sound speaker system passes source audio to automatically configured multi-channel compensation filters to provide equalization on a per channel basis for speakers having differing response characteristics. The speakers correspond to each of the surround sound channels. To automatically configure the multi-channel compensation filters, a controller generates common room tuning deviation data based on the frequency response characteristic data of each of the speakers. In addition, the system and method also generates room corrected channel deviation data for each channel by correcting a selected speaker response based on room tuning compensation requirement data derived from the common room tuning deviation data. Automatic channel balancing is provided by determining channel balancing compensation requirement data based on the corrected channel deviation data for each channel.

Abstract: A method and apparatus for processing video data at various optimum operating rates is accomplished by a video graphics circuit that includes a video graphics module, a buffer and a memory interface, where the video graphics module, which may be a graphical user interface (GUI), is operated at a first clock rate and the memory interface is operated at a second clock rate. In this circuit, the buffer temporarily stores data, such that communications with the memory interface are done at the second clock rate while communications with the video graphics module are done at the fist clock rate.

Abstract: A display data format conversion circuit and method facilitates display of data on a plurality of display devices based on display data of a source display device. The system incorporates a resynchronization circuit that dynamically varies a frame rate of one display device based on the instantaneous frame rate of the source device to maintain synchronization of the displays. A display timing generator circuit for a first display, such as an LCD display, produces a first display timing signal. The resynchronization circuit is operatively responsive to the first display timing signal and a second display timing signal wherein the second display timing signal is associated with a second display device, such as a source display device. In one embodiment, the resynchronization circuit includes a vertical blanking time variation circuit that adaptively and continuously varies the frame rate of the first display device by varying a vertical blanking time of the first display device.

Abstract: A method and apparatus for decompression of a two dimensional video texture map such that an object may subsequently be displayed as a three dimensional object is generally accomplished by a set-up engine which receives vertex parameters and generates a plurality of derivatives and Bresenham parameters, therefrom. The derivatives and Bresenham parameters are provided to an edgewalker circuit which produces, therefrom, a plurality of spans which, in turn, is converted in to a set of texel addresses by a texel address generator. A texel fetch circuit receives the set of texel addresses and uses the addresses to retrieve a set of texels, which is subsequently processed by a texel processor to produce a filtered pixel. To retrieve the set of texels, the texel fetch circuit retrieves a set of indexes based on the texel addresses and uses the set of texels to retrieve the set of texels from a codebook.

Abstract: An audio mute control signal generating circuits uses a high gain differential amplifier that switches transitions at the zero-crossing of the input audio so that the clock for a mute enable circuit is more readily controlled. The high gain differential amplifier includes a modification to a conventional type first operational amplifier in a cascaded operational amplifier configuration wherein additional cascade feedback transistors are added in parallel with differential output transistors from the first stage and are connected to an input stage of the second cascaded operational amplifier. With this configuration, when the output common mode voltage drops, the channel conductance of the cascade feedback transistors increases to oppose the change thereby increasing the common mode voltage to a suitable level so that the second stage does not inadvertently shut off.

Abstract: A 1:2 or 2:1 audio sampling rate conversion filter converts audio signals from a first sampled rate to a second sampled rate has a multi-coefficient subfilter for receiving a plurality of audio signal samples from buffer memory obtained by sampling at the first sampled rate, and for performing convolution on the plurality of audio signal samples to generate a multi-coefficient based convolution product. In combination with the multicoefficient subfilter, the audio sampling rate conversion filter has a single coefficient subfilter for only receiving a middle sample from the buffer memory and for performing convolution on the middle sample using a single middle coefficient to generate a single middle coefficient based convolution product.

Abstract: A method and apparatus for determining visibility of determining a pixel during video rendering is accomplished by determining z-positioning information of an object element. The z-positioning information is representative of the z-information of an object element in a particular section of the display. For example, the z-positioning information may be the two most significant bits of the z-parameter, or information, of an object element. Having determined the z positioning information, a comparison is made between the z positioning information of the object element and z positioning information stored in temporary memory. If this is the first object element being rendered, the z positioning information stored in the temporary memory will be initial z positioning information. When the comparison is favorable, i.e.

Abstract: A display list contains a plurality of entries which each point to a block of data to be displayed on a display screen. An attribute field associated with each entry defines the type of data in the block, so that the data may be properly processed and converted to a displayable image. The display list allows for multiple windows of different data types to be quickly processed and simultaneously displayed on the display screen.

Abstract: A voltage scaling circuit for protecting an input node to a protected circuit uses a voltage shifting circuit that includes two nmos transistors. One nmos transistor is configured as a bi-directional voltage follower and the other nmos transistor is configured as uni-directional voltage follower to facilitate input high level shifting between an input signal node, such as a pin of an integrated circuit and an input node to the protected circuit.

Abstract: A method and apparatus for generating a finely adjustable clock is accomplished by a ring oscillator, a plurality of counting circuits, and a controller. The ring oscillator generates a plurality of oscillations, wherein each of the oscillations have an approximately equal period and are phase shifted by an approximately equal phase shift. Each of the plurality of oscillations is provided to one of the counting circuits which divides the frequency of the respective oscillation by a given count value to produce corresponding periodic representation. The controller selects one of the corresponding periodic representations based on control signal to be the output oscillation, or clock signal. When the clock signal needs to be finely adjusted, the controller, based on the control signal, selects another one of the corresponding periodic representations.

Abstract: A method for drawing lines on a graphics device in such manner in that only those points lying inside a specified rectangular area of the device are drawn. Predetermined digital outcodes are generated for defining the endpoints of the lines and a decision is made whether to draw or not draw the lines based on the relationship of the endpoints with respect to both the specified rectangular area of the device, and a second larger rectangular area of the device.