Abstract: A texture compression method is described. The method comprises splitting an original texture having a plurality of pixels into original blocks of pixels. Then, for each of the original blocks of pixels, a partition is identified that has one or more disjoint subsets of pixels whose union is the original block of pixels. The original block of pixels is further subdivided into one or more subsets according to the identified partition. Finally, each subset is independently compressed to form a compressed texture block.

Abstract: Described is a multi-purpose power controller and application specific standard product (ASSP) with improved block unification, reduced size and power, boot strapping, and power management. A multi-purpose field programmable non-volatile system power controller and ASSP initializing block may be embedded in a processor, such as a central processing unit (CPU), graphics processing unit (GPU), accelerated processing unit (APU), or other chipset. This controller and initializing block may be a configurable, while maintaining specialization, hardware block. This block may be implemented as a complex programmable logic device or as a simple cascaded programmable logic array block, such as being the equivalent of a few hundred logic gates, for example. Described also is a method of performing power sequencing and boot strapping for internal and external blocks on a chipset. The method includes powering a system power controller and initializing block and saving a power-up sequencing in a nonvolatile wake-up table.

Abstract: A method and apparatus to maximize video slice size is described herein. The method packs as many macroblocks as possible within a capped-size slice, while preserving user-defined quality constraints. The probability to conform to the maximum slice size constraint may be adjusted according to a user-defined parameter. The method may be integrated into a rate control process of a video encoder. The method predicts whether encoding a macroblock with a quantization parameter exceeds a current slice size constraint. It further predicts whether encoding a given number of macroblocks with a given configuration of quantization parameters exceeds the current slice size constraint. The method then proceeds to encode the current macroblock either on a condition that encoding the given number of macroblocks with the given configuration of quantization parameters falls below the size constraint of the current slice or after determining that a new slice is needed.

Abstract: A method and apparatus for rate control for a constant-bit-rate finite-buffer-size video encoder is described. Rate control is provided by adjusting the size of non-intra frames based on the size of intra frames. A sliding window approach is implemented to avoid excessive adjustment of non-intra frames located near the end of a group of pictures. A measurement of “power” based on a sum of absolute values of pixel values is used. The “power” measurement is used to adjust a global complexity value, which is used to adjust the sizes of frames. The global complexity value responds to scene changes. An embodiment of the invention calculates and uses L1 distances and pixel block complexities to provide rate control. An embodiment of the invention implements a number of bit predictor block. Predictions may be performed at a group-of-pictures level, at a picture level, and at a pixel block level. An embodiment of the invention resets a global complexity parameter when a scene change occurs.

Abstract: A method for determining a macroblock (MB) coding mode for a current MB in a dependent view. A window around a co-located MB in a base view is determined, wherein the co-located MB is a MB in the base view having a same location as the current MB in the dependent view. A coding mode complexity value (CMCV) is determined for each MB in the window, wherein the CMCV is based on a coding mode used to encode the MB. Rate distortion optimization (RDO) is performed for the current MB using a reduced number of coding modes if a total CMCV for all MBs in the window is less than a threshold, or using all supported coding modes if the total CMCV for all MBs in the window is greater than the threshold. A coding mode for the current MB is determined based on the RDO results.

Abstract: An apparatus, computer readable medium, and method of event based dynamic power management. The method includes responding to receiving an indication of an event that is external to a hardware block engine by adjusting the power to the hardware block engine, if the event indicates that the power to the hardware block engine should be adjusted. The method may include receiving a second event that is external to the hardware block engine. The method may include determining whether or not the power should be adjusted to the hardware block engine based on the event and the second event. If it is determined that the power should be adjusted, then the power may be adjusted to the hardware block based on the event and second event. A method of monitoring a component and sending an indication of an event that the component will not require a hardware block engine is disclosed.

Abstract: A method of assembling a semiconductor chip device is provided that includes placing an interposer on a first semiconductor chip. The interposer includes a first surface seated on the first semiconductor chip and a second surface adapted to thermally contact a heat spreader. The second surface includes a first aperture. A second semiconductor chip is placed in the first aperture.

Abstract: Methods and apparatus for restricting access by one or more processors to an area of a secondary storage unit are presented herein. The methods and apparatus may comprise an independent programmable storage controller logic that divides a storage area of the secondary storage unit into at least a first area and a second area and controls usage of the areas as at least two virtual secondary storage units such that the processor(s) access the at least two virtual secondary storage units as if accessing at least two physical secondary storage units by selecting one of the at least two virtual secondary storage units as an active virtual secondary storage unit to provide the processor(s) access to the active virtual secondary storage unit based on a secondary storage unit configuration. Each virtual secondary storage unit may contain at least one region of which an access permission setting is modifiable.

Abstract: Methods are provided for creating objects in a way that permits an API client to explicitly participate in memory management for an object created using the API. Methods for managing data object memory include requesting memory requirements for an object using an API and expressly allocating a memory location for the object based on the memory requirements. Methods are also provided for cloning objects such that a state of the object remains unchanged from the original object to the cloned object or can be explicitly specified.

Abstract: A system and method for measuring integrated circuit (IC) temperature. An integrated circuit (IC) includes a thermal sensor and data processing circuitry. The thermal sensor utilizes switched currents provided to a reference diode and a thermal diode. The ratios of the currents provided to each of these diodes may be chosen to provide a given delta value between the resulting sampled diode voltages. At a later time, a different ratio of currents may be provided to each of these diodes to provide a second given delta value between the resulting sampled diode voltages. A differential amplifier within the data processing circuitry may receive the analog sampled voltages and determine the delta values. Other components within the data processing circuitry may at least digitize and store one or both of the delta values. A difference between the digitized delta values may calculated and used to determine an IC temperature digitized code.

Abstract: An apparatus includes a clock circuit and a plurality of display interface circuits. The clock circuit provides a common clock signal. The display interface circuits each provide a respective display link clock signal in response to the common clock signal. One of the display link clock signals is at a different clock speed that another of the display link clock signals.

Abstract: A method and apparatus provide for improving signal quality. The method includes receiving a first media signal, such as a video signal, in a first format, such as 1080p. The provided video signal is one that is created by upsampling a video signal recorded in a format having a lower sampling rate. The method also includes obtaining a second signal indicative of error within the first media signal. The second signal is in a second format, such as the format having a lower sampling rage in which the video signal was recorded. The signal is processed to place the second signal in the format of the first signal. Then, the estimated error signal is combined with the original signal to arrive at an error corrected output.

Abstract: An apparatus and methods for controlling power consumption in video encoding obtain, before motion estimation is performed on an image frame to be encoded, information regarding an amount of the image frame to be encoded that is static with respect to a previously encoded image frame. The apparatus and methods adjust power consumption of the video encoder based on the obtained information regarding the amount of the image frame to be encoded that is static.

Abstract: An apparatus and methods for modifying gradation in an image frame determine a blend factor indicating a first weighting associated with a previously processed portion of the image frame. The apparatus and methods generate a weighted value associated with a current region of the image frame based on the current region of the image frame and based on applying the first weighting to the previously processed portion of the image frame so as to modify the gradation in the image frame.

Abstract: A reference voltage generator is provided. In an example, the reference voltage generator includes a temperature-dependent device, a processing module configured to process a digital representations of first and second voltages derived from the temperature-dependent device and a reference voltage to determine a value, and a digital to analog converter (DAC) configured to generate a reference voltage based on the value. The first voltage is proportional to absolute temperature (PTAT) and the second voltage is complementary to absolute temperature (CTAT) and the reference voltage is substantially independent of absolute temperature in an operating temperature range of the reference voltage generator.

Abstract: A method of managing power consumption in a video device capable of displaying encoded multi-stream video is disclosed. Power reduction is achieved by limiting the amount of video and audio decoding and processing performed on at least some of the encoded streams, by taking particular application contexts into account. In a normal power consumption mode, audio/video data from all streams are decoded and digitally processed for output. In response to detecting a reduced power consumption mode, audio/video from at least some of the streams are processed in a modified manner to reduce power consumption.

Abstract: Various semiconductor chip solder bump and underbump metallization (UBM) structures and methods of making the same are disclosed. In one aspect, a method is provided that includes depositing a layer of a first metallic material on a semiconductor chip. The first layer has a first physical quantity. A layer of a second metallic material is deposited on the layer of the first metallic material. The second layer has a second physical quantity. The first and second layers are reflowed to form a solder structure with a desired ratio of the first metallic material to the second metallic material.

Abstract: Techniques are disclosed relating to controlling power consumption of temperature sensors in integrated circuits. In one embodiment, an integrated circuit is disclosed that includes a temperature sensor that is configured to determine a temperature of the integrated circuit. The integrated circuit also includes a sensor controller that is configured to vary power consumption of the temperature sensor based, at least in part, on the determined temperature. In some embodiments, the integrated circuit may determine a sampling rate of the temperature sensor based, at least in part, on the determined temperature and a temperature threshold of the integrated circuit. The integrated circuit may then vary the power consumption of the temperature sensor by periodically disabling the temperature sensor based on the determined sampling rate.

Abstract: The present method and system enables receiving a radio frequency (RF) signal. The received RF signal is assigned to a single instruction multiple data (SIMD) module in an accelerated processing device (APD) for processing to extract network messages. The extracted network layer messages are further processed by the SIMD module to obtain data transmitted via the RF signal.

Abstract: The present invention provides a multi-purpose power controller and application specific standard product (ASSP) with improved block unification, reduced size and power, boot strapping, and power management. A multi-purpose field programmable non-volatile system power controller and ASSP initializing block may be embedded in a processor, such as a central processing unit (CPU), graphics processing unit (GPU), accelerated processing unit (APU), or other chipset. This controller and initializing block may be a configurable, while maintaining specialization, hardware block. This block may be implemented as a complex mid-size complex programmable logic devices (CPLD) or as a simple cascaded programmable logic array block, such as being the equivalent of a few hundred logic gates, for example.