Abstract: An asynchronous persistent group bonus game system, method and apparatus may have a plurality of gaming machines including a first processor and a bonus server having a second processor. The first processor may be configured to: determine when a bonus game session event is triggered, transmit a bonus game session request to the second processor, and receive an end session notification from the second processor. The second processor may be configured to execute and maintain the always-on asynchronous persistent group bonus game, receive a bonus game session request from at least one of the plurality of gaming machines, instantiate a bonus game session inside the continuous asynchronous persistent group bonus game for the at least one gaming machine, determine when an end session trigger has been triggered for the bonus game session, and transmit an end session notification to the at least one gaming machine if it is determined that the end session condition has been triggered.

Abstract: A non-limiting embodiment of a titanium alloy comprises, in percent by weight based on total alloy weight: 5.1 to 6.5 aluminum; 1.9 to 3.2 tin; 1.8 to 3.1 zirconium; 3.3 to 5.5 molybdenum; 3.3 to 5.2 chromium; 0.08 to 0.15 oxygen; 0.03 to 0.20 silicon; 0 to 0.30 iron; titanium; and impurities. A non-limiting embodiment of the titanium alloy comprises an intentional addition of silicon in conjunction with certain other alloying additions to achieve an aluminum equivalent value of at least 6.9 and a molybdenum equivalent value of 7.4 to 12.8, which was observed to improve tensile strength at high temperatures.

Abstract: A gaming monetary instrument tracking system is configured to track sources for the monetary value of a monetary instrument across multiple previous gaming transactions. The system can include a plurality of system nodes in communication with a system server. The system nodes can be electronic gaming devices, which can generate data with respect to gaming monetary instruments that each have a monetary value, and some of the system nodes can also issue new gaming monetary instruments. The system server can receive data generated by the system nodes and create data structures that link multiple gaming monetary instruments with each other according to multiple different transactions regarding the instruments at different times and across multiple different nodes. A historical record for each instrument can provide data regarding related previous transactions and instruments.

Abstract: In one embodiment, a gaming system, method, and device may have a memory having a plurality of power management rules and a processor configured to receive a power status information from another device, retrieve at least one power management rule from the memory, and configure a power state of the gaming device or its peripheral device based on the power status information and the at least one power management rule.

Abstract: Improvements in the graphics processing pipeline are disclosed. More specifically, a new primitive shader stage performs tasks of the vertex shader stage or a domain shader stage if tessellation is enabled, a geometry shader if enabled, and a fixed function primitive assembler. The primitive shader stage is compiled by a driver from user-provided vertex or domain shader code, geometry shader code, and from code that performs functions of the primitive assembler. Moving tasks of the fixed function primitive assembler to a primitive shader that executes in programmable hardware provides many benefits, such as removal of a fixed function crossbar, removal of dedicated parameter and position buffers that are unusable in general compute mode, and other benefits.

Abstract: Methods and devices are provided for processing image data on a sub-frame portion basis using layers of a convolutional neural network. The processing device comprises memory and a processor. The processor is configured to receive frames of image data comprising sub-frame portions, schedule a first sub-frame portion of a first frame to be processed by a first layer of the convolutional neural network when the first sub-frame portion is available for processing, process the first sub-frame portion by the first layer and continue the processing of the first sub-frame portion by the first layer when it is determined that there is sufficient image data available for the first layer to continue processing of the first sub-frame portion. Processing on a sub-frame portion basis continues for subsequent layers such that processing by a layer can begin as soon as sufficient data is available for the layer.

Abstract: Data processing methods and devices are provided. A processing device comprises memory and a processor. The memory, which comprises a cache, is configured to store portions of data. The processor is configured to issue a store instruction to store one of the portions of data, provide identifying information associated with the one portion of data, compress the one portion of data; and store the compressed one portion of data across multiple lines of the cache using the identifying information. In an example, the one portion of data is a block of pixels and pixels and the processor is configured to request pixel data for a pixel of a compressed block of pixels, send additional requests for data for other pixels determined to belong to the compressed pixel block and provide an indication that the requests are for pixel data belonging to the compressed block of pixels.

Abstract: A method and system for managing applications on a virtual machine includes creating a plurality of virtual machines on a computer system. Each virtual machine is isolated from one another. Resources are allocated to each virtual machine based upon a resource requirement of an application executing on each virtual machine.

Abstract: Methods and devices are provided for encoding video. By using co-sited gradient and variance values to detect text and line in frames of the video. A processor is configured to receive a plurality of frames of video, determine, for a portion of a frame, a variance of the portion of the frame and a gradient of the portion of the frame and encode, using one of a plurality of different encoding qualities, the portion of the frame based on the gradient and the variance of the portion of the frame. Encoding is performed at both the sub-frame level and frame level. The portion of the frame is classified into one of a plurality of categories based on the gradient and variance and encoded based on the category.

Abstract: A processing apparatus and video encoding method are provided which include receiving a portion of a video sequence and determining complexities for blocks of pixels of the portion of the video sequence. Quantization parameter values for corresponding blocks of pixels are selected based on complexities of the corresponding blocks and visually perceived coding artifacts of the corresponding blocks produced by the quantization parameter values. The blocks of pixels are encoded, using the selected quantization parameter values. The blocks of pixels are decoded and the portion of the video sequence is provided for display.

Abstract: Systems, apparatuses, and methods for generating a model for determining a quantization strength to use when encoding video frames are disclosed. A pre-encoder performs multiple encoding passes using different quantization strengths on a portion or the entirety of one or more pre-processed video frames. The pre-encoder captures the bit-size of the encoded output for each of the multiple encoding passes. Then, based on the multiple encoding passes, the pre-encoder generates a model for mapping bit-size to quantization strength for encoding video frames or portion(s) thereof. When the encoder begins the final encoding pass for one or more given video frames or any portion(s) thereof, the encoder uses the model to map a preferred bit-size to a given quantization strength. The encoder uses the given quantization strength when encoding the given video frame(s) or frame portion(s) to meet a specified bit-rate for the encoded bitstream.

Abstract: A method and system for recording and logging errors in a computer system includes reading first error handling information with respect to a transaction. The first error handling information is stored in a first component, and based upon a condition of the storage in the first component, an oldest error information is evicted from the first component.

Abstract: A receiver circuit includes an analog front end and a non-linear equalizer. The analog front end including a super source follower (SSF) amplifier having a first input terminal adapted to couple to a transmission line to receive an input signal referenced to a first voltage level, a second input adapted to receive a reference voltage, and first and second output terminals adapted to provide an amplified signal referenced to a second voltage level. The non-linear equalizer coupled to receive an output signal of the analog front end and compensate for inter-symbol interference at a data rate of at least 14 Gbps. The SSF amplifier includes transistors having relative sizes selected to provide a frequency response of the SSF amplifier with a peak at a frequency approximately ? of the data rate.

Abstract: A technique for managing access to a micro engine, the method comprising: determining that a virtual function “VF”) is to be given access to direct communication with a micro engine; in response to the determining, configuring the micro engine to accept direct communication from the VF; monitoring for unpermitted communication; and after a time period has expired, configuring the micro engine to no longer accept direct communication from the VF.

Abstract: A tool changing system that includes a tool mount adapter and a tool holder. The tool mount adapter is configured to be attached to a tool and selectively engage and disengage a tool bit. The tool provides movement to the engaged tool bit to perform work on a workpiece. The tool holder is positioned in proximity to hold the tool bit when the tool bit is not engaged by the tool. The tool holder can also selectively engage and disengage the tool bit.

Abstract: A graphics processing system comprises at least one memory device storing a plurality of pixel command threads and a plurality of vertex command threads. An arbiter coupled to the at least one memory device is provided that selects a pixel command thread from the plurality of pixel command threads and a vertex command thread from the plurality of vertex command threads. The arbiter further selects a command thread from the previously selected pixel command thread and the vertex command thread, which command thread is provided to a command processing engine capable of processing pixel command threads and vertex command threads.

Abstract: A system, method and a non-transitory computer readable storage medium are provided for hybrid rendering with deferred primitive batch binning. A primitive batch is generated from one or more primitives. A bin is identified for processing the primitive batch. At least a portion of each primitive intersecting the identified bin is processed and a next bin for processing the primitive batch is identified based on an intercept walk order. The processing is iteratively repeated for the one or more primitives in the primitive batch for successive bins until all primitives of the primitive batch are completely processed. Then, the one or more primitives in the primitive batch are further processed.

Abstract: Various semiconductor chip solder bump and underbump metallization (UBM) structures and methods of making the same are disclosed. In one aspect, a method is provided that includes forming a first underbump metallization layer on a semiconductor chip is provided. The first underbump metallization layer has a hub, a first portion extending laterally from the hub, and a spoke connecting the hub to the first portion. A polymer layer is applied to the first underbump metallization layer. The polymer layer includes a first opening in alignment with the hub and a second opening in alignment with the spoke. A portion of the spoke is removed via the second opening to sever the connection between the hub and the first portion.

Abstract: In a system with a master processor and slave processors, sync points are used in boot instructions. While executing the boot instructions, the slave processor determines whether the sync point is enabled. In response to determining the sync point is enabled, the slave processor pauses execution of the boot instructions, waits for commands from the master processor, receives commands from the master processor, executes the received commands until a release command is received, and then continues to execute boot instructions. In response to determining the sync point is not enabled, the slave processor continues to execute boot instructions.

Abstract: A graphics processing architecture in one example performs vertex manipulation operations and pixel manipulation operations by transmitting vertex data to a general purpose register block, and performing vertex operations on the vertex data by a processor unless the general purpose register block does not have enough available space therein to store incoming vertex data; and continues pixel calculation operations that are to be or are currently being performed by the processor based on instructions maintained in an instruction store until enough registers within the general purpose register block become available.