Abstract: A voltage converter circuit includes one or more single-walled carbon nanotube transistors, capable of handling relatively high amounts of current. The transistors are formed using a porous structure which has a number of single-walled carbon nanotubes. The porous structure may be anodized aluminum oxide or another porous material. The circuit will be especially suited for power applications, including use in portable electronic devices such as notebook computers, MP3 players, mobile phones, digital cameras, personal digital assistants, and other battery-operated devices.

Abstract: Fabricating single-walled carbon nanotube transistor devices includes removing undesirable types of nanotubes. These undesirable types of nanotubes may include nonsemiconducting nanotubes, multiwalled nanotubes, and others. The undesirable nanotubes may be removed electrically using voltage or current, or a combination of these. This approach to removing undesirable nanotubes is sometimes referred to as “burn-off.” The undesirable nanotubes may be removed chemically or using radiation. The undesirable nanotubes of an integrated circuit may be removed in sections or one transistor (or a group of transistors) at a time in order to reduce the electrical current used or prevent damage to the integrated circuit during burn-off.

Abstract: Single-walled carbon nanotube transistor devices, and associated methods of making such devices include a porous structure for the single-walled carbon nanotubes. The porous structure may be anodized aluminum oxide or another material. Electrodes for source and drain of a transistor are provided at opposite ends of the single-walled carbon nanotube devices. A concentric gate surrounds at least a portion of a nanotube in a pore. A transistor of the invention may be especially suited for power transistor or power amplifier applications.

Abstract: A carbon nanotube transistor structure includes a number of carbon nanotubes extending vertically in a substrate material. A drain electrode of the transistor is connected to the carbon nanotubes at a first depth position, and a source electrode for the transistor structure connected to the carbon nanotubes at a second depth position. A gate electrode extends vertically along a side of the nanotubes, between the first and second depth positions. There may be multiple vertical side gate electrodes and multiple carbon nanotubes between these side gate electrodes.

Abstract: A seal has a tight sealing between a first space and a second space. The second space is at least partially enclosed by a member. The apparatus includes or performs creating or maintaining a pressure difference between a pressure in a third space at a seal assembly and pressure in each of the first space and the second space; and pushing, caused by the pressure difference, against a seal in the seal assembly to tighten sealing provided by the seal.

Abstract: A carbon nanotube of a nanotube device has at least two segments with different characteristics. The segments meet at a junction and a diameter of the carbon nanotube on either side of the junction is about the same. One segment may be doped differently from another segment. One segment may be p doped and another segment n doped. One segment may be doped with a different carrier concentration from another segment. The nanotube device may be used in power semiconductor devices including power diodes and power transistors. These power devices will be very power efficient, wasting significantly less energy than similar manufactured using silicon technology.

Abstract: Heterostructure devices incorporate carbon nanotube technology to implement rectifying devices including diodes, rectifiers, silicon-controlled rectifiers, varistors, and thyristors. In a specific implementation, a rectifying device includes carbon nanotube and nanowire elements. The carbon nanotubes may be single-walled carbon nanotubes. The devices may be formed using parallel pores of a porous structure. The porous structure may be anodized aluminum oxide or another material. A device of the invention may be especially suited for high power applications.

Abstract: An apparatus that facilitates tight sealing between a first space and a second space. The second space is at least partially enclosed by a member. The apparatus includes or performs creating or maintaining a pressure difference between a pressure in a third space at a seal assembly and pressure in each of the first space and the second space; and pushing, caused by the pressure difference, against a seal in the seal assembly to tighten sealing provided by the seal.

Abstract: Heterostructure devices incorporate carbon nanotube technology to implement rectifying devices including diodes, rectifiers, silicon-controlled rectifiers, varistors, and thyristors. In a specific implementation, a rectifying device includes carbon nanotube and nanowire elements. The carbon nanotubes may be single-walled carbon nanotubes. The devices may be formed using parallel pores of a porous structure. The porous structure may be anodized aluminum oxide or another material. A device of the invention may be especially suited for high power applications.

Abstract: Solutions permit or facilitate faster and/or easier processing involving loading or unloading of a work module into a process station. For example, the work module may be a processing tube or the like and the process station may be a heating station such as a tube furnace or the like. In one embodiment, the loading is from a single side of a process station. In one embodiment, the work module includes inlets and outlets for fluid flow, with both inlets and outlets being closer toward one side of the work module than the other side.

Abstract: A vertical device geometry for a carbon-nanotube-based field effect transistor has one or multiple carbon nanotubes formed in a trench.

Abstract: An integrated circuit layout of a carbon nanotube transistor device includes a first and second conductive material. The first conductive material is connected to ends of single-walled carbon nanotubes below (or above) the first conductive material. The second conductive material is not electrically connected to the nanotubes below (or above) the second conductive material. The first conductive material may be metal, and the second conductive material may be polysilicon or metal. The nanotubes are perpendicular to the first conductive material. In one implementation, the first and second conductive materials form interdigitated fingers. In another implementation, the first conductive material forms a serpentine track.

Abstract: An integrated circuit layout of a carbon nanotube transistor device includes a first and second conductive material. The first conductive material is connected to ends of single-walled carbon nanotubes below (or above) the first conductive material. The second conductive material is not electrically connected to the nanotubes below (or above) the second conductive material. The first conductive material may be metal, and the second conductive material may be polysilicon or metal. The nanotubes are perpendicular to the first conductive material. In one implementation, the first and second conductive materials form interdigitated fingers. In another implementation, the first conductive material forms a serpentine track.

Abstract: During fabrication of single-walled carbon nanotube transistor devices, a porous template with numerous parallel pores is used to hold the single-walled carbon nanotubes. The porous template or porous structure may be anodized aluminum oxide or another material. A gate region may be provided one end or both ends of the porous structure. The gate electrode may be formed and extend into the porous structure.

Abstract: Carbon-nanotube-based devices or nanowire-based devices are formed in multiple layers to obtain higher density of such devices. The layers may be all similar such as all carbon-nanotube-based transistors. Or they may be different, such as one layer with nanowire devices and another layer with nanotube devices. Or some layers such as the bottom layer may be based on silicon devices and another layer with nanotube devices. Traditional interconnects and vias may be used to connect layers and electrodes, or nanoscale materials such as nanotubes or nanowires may be used as interconnects or vias.

Abstract: During fabrication of single-walled carbon nanotube transistor devices, a porous template with numerous parallel pores is used to hold the single-walled carbon nanotubes. The porous template or porous structure may be anodized aluminum oxide or another material. A gate region may be provided one end or both ends of the porous structure. The gate electrode may be formed and extend into the porous structure.

Abstract: Single-walled carbon nanotube transistor and rectifying devices, and associated methods of making such devices include a porous structure for the single-walled carbon nanotubes. The porous structure may be anodized aluminum oxide or another material. Electrodes for source and drain of a transistor are provided at opposite ends of the single-walled carbon nanotube devices. A gate region may be provided one end or both ends of the porous structure. The gate electrode may be formed into the porous structure. A transistor of the invention may be especially suited for power transistor or power amplifier applications.

Abstract: During fabrication of single-walled carbon nanotube transistor devices, a porous template with numerous parallel pores is used to hold the single-walled carbon nanotubes. The porous template or porous structure may be anodized aluminum oxide or another material. A gate region may be provided one end or both ends of the porous structure. The gate electrode may be formed and extend into the porous structure. A transistor of the invention may be especially suited for power transistor or power amplifier applications.

Abstract: Single-walled carbon nanotube transistor and rectifying devices, and associated methods of making such devices include a porous structure for the single-walled carbon nanotubes. The porous structure may be anodized aluminum oxide or another material. Electrodes for source and drain of a transistor are provided at opposite ends of the single-walled carbon nanotube devices. A gate region may be provided one end or both ends of the porous structure. The gate electrode may be formed into the porous structure. A transistor of the invention may be especially suited for power transistor or power amplifier applications.