Abstract: An electronic data processing device includes a data processing member provided for controlling, based on first and second encoded data, a secured operation initiated by a user, a memory which is configurable in order to delimit at least one secured memory part within that memory, to each secured memory parts there being assigned a dedicated address range. The data processing member includes N (N?2) processing units of which M (M?N?1) processing units are provided to process the secured operation and at least one of the remaining N-M processing units is provided for processing application data, to each of the M processing units there is assigned at least one of the secured memory parts via of a configuration element controlled by a selected one of the M processing units. The second memory is provided with a memory access controller provided for controlling access to the second memory.
Type:
Grant
Filed:
December 13, 2004
Date of Patent:
June 30, 2009
Assignee:
ATOS Worldline SA
Inventors:
Peter Timmermans, Carl Van Himbeeck, Mark Vanophalvens
Abstract: An electronic data processing device, comprising an access protected memory, provided for storing secure data and a data processing member, provided for processing said secure data, said terminal comprises a tampering detection and protection circuit provided for detecting a tamper condition and for generating a tamper signal upon detection of said tamper condition, said tampering detection and protection circuit being connected to a tampering sequencer, provided for disabling said processing member upon receipt of said tampering signal, said memory comprises a security register provided for storing keys for encrypting said secure data and a memory section provided for storing keys for encrypting said secure data and a memory section provided for temporarily storing secure data processed by said data processing member, said tampering sequencer comprises an internal clock generator provided for generating, upon receipt of said tamper signal a tamper pulse and a series of clock pulses, said tampering sequencer
Type:
Grant
Filed:
December 6, 2004
Date of Patent:
November 18, 2008
Assignee:
Atos Worldline SA
Inventors:
Peter Timmermans, Carl Van Himbeeck, Marc Moons
Abstract: A method and a device for reading out keys of a keyboard. The read-out is realised by randomly generating a scanning pattern comprising for each row and column a read-out value to be applied on the rows and columns. The scanning pattern is preferably changed after having been applied to the keys. After application of the randomly generated pattern, the verification routine is applied in order to identify the selected keys.