Abstract: A video interface circuit for displaying the output of a video camera on a video monitor of the type used for displaying computer output data. In a first mode of operation, data from a video camera is stored in a first video memory while data previously stored in a second video memory is displayed on a video monitor. In a second mode of operation, there is provided the further steps of displaying information previously stored in the first and second video memories alternately on the video monitor. In a third mode of operation, data previously stored in the first and second video memories is read out one word at a time. If a predetermined bit in the word read from the second video memory has a first predetermined logical level, the word read from the first video memory is displayed on the video monitor. Alternately, if the predetermined bit in the word read from the second video memory has a second predetermined level, the word read from the second video memory is displayed on the video monitor.