Abstract: In a delta sigma analog to digital converter, generally comprising a noise shaping filter element fed into a multilevel quantizer, the output of which is the output of the delta sigma modulator and is also fed through a digital to analog converter array in a feedback loop to the noise shaping filter, dynamic element matching circuitry is included in the quantizer, in a reference path. The quantizer includes dynamic element matching circuitry for shaping the usage of the elements of the quantizer. Specifically, reference voltages are switched to specific comparators according to control signals from switch control circuitry.

Abstract: The digital amplifier of the present invention comprises a delta sigma noise shaper feeding a pulse wave modulator (PWM) which drives a load such as a speaker. The amplifier includes circuitry to measure the voltage coming out of the power supply in the circuit, and using this measurement as a control signal to modify the feedback path and direct path of the noise shaper, in order to correct the pulse width output to compensate for the varying power supply voltages. The amplifier may also include circuitry to correct for the nonlinear effects of pulse wave modulation, by correcting the feedback applied to one stage of the noise shaper such that it is nontrivially different from the feedback applied to another stage.

Abstract: A switching output stage for Class D amplifiers and the like utilizes a floating power supply providing a relative positive output voltage VP at a first line and a relative negative output voltage VM at a second line. Two switches are connected in parallel across the two lines. The first switch has a common to ground and switches between VP and VM, and the second switch has a common to a low pass output filter and switches between VP and VM. The input to the filter can take on three values, VP, VM, and 0. The input VP to the filter is achieved by switching the first switch to VM and the second switch to VP, and the input VM to the filter is achieved by switching the first switch to VP and the second switch to VM. The input 0 to the filter may be achieved by switching both the first switch and the second switch either to VP or to VM.