Patents Assigned to Automatic Parallel Design Limited
  • Method and apparatus for binary encoding logic circuits
    Patent number: 6628215
    Abstract: A method and apparatus for state assignment of a logic circuit comprises receiving internal state representations for the logic circuit, determining binary code for the internal state representations by successively dividing the states into disjoint sets of ever decreasing size Each disjoint set of a pair is assigned a one bit at each division step. The division can continue for all bits to be encoded, or the division can be halted and exact encoding used for the encoding of the final number of bits.
    Type: Grant
    Filed: January 29, 2001
    Date of Patent: September 30, 2003
    Assignee: Automatic Parallel Design Limited
    Inventors: Sunil Talwar, Peter Meulemans