Abstract: A system side interface of a PHY chip used in conjunction with a 100 GBASE backplane, sends and receives data using an NRZ signal format, but at a data rate of between about 26.5 Gbps/per lane to 27.2 Gbps/per lane, which is consistent with the PAM 4 signaling protocol. Thus, chip-to-chip communications between a PHY chip and a switch or controller chip can use an “overclocked” NRZ signaling format, reducing the amount of logic needed, which in turn can reduce signal latency, and reduce the chip area and power consumption required to implement the logic.

Abstract: Aspects of the subject disclosure may include, for example, a wireless power receiver configured to receive a wireless power signal from a power transmitting unit. A wireless radio unit is configured to communicate with the power transmitting unit. A controllable rectifier circuit is configured to rectify the wireless power signal. The controllable rectifier circuit can include a rectifier configured to generate a rectified voltage from the wireless power signal, based on switch control signals. A rectifier control circuit is configured to generate the switch control signals and to generate first control data that indicates a first rectifier duty cycle of the switch control signals. The wireless radio unit sends the first control data to the power transmitting unit. Other embodiments are disclosed.

Abstract: One or more coordinating devices may be utilized to control high speed data transmission among a plurality of wireless devices utilizing 60 GHz for high speed data transmission. Control messages may be sent and/or received between each of the plurality of wireless devices and the one or more coordinating devices utilizing low rate control connections via available secondary physical layers. The secondary physical layers may comprise Bluetooth, 802.11, and/or UWB physical layers. The controlling may comprise time coordination, frequency coordination, and/or spatial coordination that may enable the wireless devices to align and/or position directional antenna that may be utilized to perform the 60 GHz high speed data transmission. The wireless devices may utilize the low rate control connections to communicate reporting messages to the one or more coordinating devices. The reporting information may enable the one or more coordinating devices to manage available resources in the plurality of wireless devices.

Abstract: A power amplifier comprises a common source amplification stage and a first common gate amplification stage. The common source amplification stage includes a common source transistor for receiving a radio frequency (RF) input signal via a gate. The first common gate amplification stage is connected in cascode between a variable supply voltage source and the common source amplification stage, and amplifies an output of the common source amplification stage. The first common gate amplification stage includes a first common gate transistor, and a first gate bias controller configured to generate a first divided voltage based on a variable supply voltage of the variable supply voltage source, and to supply a first gate bias voltage generated by buffering the first divided voltage to a gate of the first common gate transistor.

Abstract: An optical assembly for use in an optical telecommunications system and method for aligning the optical assembly. The assembly uses a pair of ball bearings to support an optical fibre on a baseplate. The optical fibre is aligned with respect to an optical device and then the first ball bearing is inserted and welded in place. The fibre alignment is then fine tuned and the second ball bearing is inserted and welded in place, thereby providing a simpler and more accurate method of aligning an optical fibre to an optical device.

Abstract: Using lateral physical modulation, the optical properties of VCSELs can be stabilized and controlled by spatially varying the characteristics of the device material. This results in stabilization of the linewidth, the numerical aperture, the near and far field, as a function of bias and temperature. A VCSEL includes a substrate, an active region sandwiched between an upper and lower distributed Bragg reflector (DBRs), and electrical contacts. A light emission property e.g. the index of refraction, may be varied by patterning or texturing the surface of the substrate prior to growth of the epitaxial DBR layers or at least one layer of either the upper or lower DBRs, or by inserting a non-planar layer.