Patents Assigned to Avago Technologies International
  • Patent number: 11995010
    Abstract: Systems and methods relate to a bus adapter for a storage network. The bus adaptor includes a context memory comprising a first storage for uncacheable exchange resource indicators (XRI) and a second storage for cacheable XRI. The bus adapter also includes a host backing store unit configured to provide access to the different tier memories present locally or externally in the host memory extension using several caching sub-units and with the capability of an optional pinning operation for the cacheable XRI based upon at least one of input/output phase, first in line up to a limit, a region of a virtual context address associated with the cacheable XRI indicators, a protocol associated with the cacheable XRI, a size of a transaction, or work queue information.
    Type: Grant
    Filed: April 16, 2021
    Date of Patent: May 28, 2024
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: Marc Pegolotti, Kenny Wu, Ravi Shenoy, Gregorio Gervasio, Jr., Lalit Chhabra, Mark Karnowski, James Winston Smart, Vuong Cao Nguyen
  • Patent number: 11997008
    Abstract: A system and method for non-disruptive route change. The method includes receiving a first data transmission frame associated with a first exchange at a switch, transmitting the first data transmission frame through a first route based on a route lookup, determining, by a traffic optimization circuit, an improved second route, determining if the first exchange includes any other data transmission frames, and transmitting a first data transmission frame associated with a second exchange through the second route in response to determining that the first exchange does not include any other data transmission frames.
    Type: Grant
    Filed: January 31, 2023
    Date of Patent: May 28, 2024
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: Sathish K Gnanasekaran, Badrinath Kollu, Kung-Ling Ko, Chao Zhang, Li Zhao, Pushpanathan Chidambaram
  • Patent number: 11989143
    Abstract: Described herein are systems, methods, and products utilizing a cache coherent switch on chip. The cache coherent switch on chip may utilize Compute Express Link (CXL) interconnect open standard and allow for multi-host access and the sharing of resources. The cache coherent switch on chip provides for resource sharing between components while independent of a system processor, removing the system processor as a bottleneck. Cache coherent switch on chip may further allow for cache coherency between various different components. Thus, for example, memories, accelerators, and/or other components within the disclose systems may each maintain caches, and the systems and techniques described herein allow for cache coherency between the different components of the system with minimal latency.
    Type: Grant
    Filed: June 28, 2022
    Date of Patent: May 21, 2024
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: Shreyas Shah, George Apostol, Jr., Nagarajan Subramaniyan, Jack Regula, Jeffrey S. Earl
  • Patent number: 11991228
    Abstract: Systems and methods transfer video data to an image processing system from a video source. Pixel data is received in a local buffer of a network interface controller and provided in a video transport packet. The video transport packet includes the pixel data, a media access control header and a video header. The video transport packet is received by another network interface controller that provides the pixel data directly into a video frame buffer of the image processing system.
    Type: Grant
    Filed: November 2, 2022
    Date of Patent: May 21, 2024
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventor: Dmitrii Loukianov
  • Publication number: 20240163924
    Abstract: A device can detect an energy level of an OBSS communication. The device can determine an identity associated with the OBSS communication. The device can determine a threshold associated with the identity of the OBSS communication. The device can compare the energy level of the OBSS communication to the threshold. The device can transmit a message simultaneous to the OBSS communication on a same link as the OBSS communication. The message can be transmitted based on the comparison of the threshold to the energy level of the OBSS communication.
    Type: Application
    Filed: April 26, 2023
    Publication date: May 16, 2024
    Applicant: Avago Technologies International Sales Pte. Limited
    Inventors: Sindhu Verma, Shubhodeep Adhikari, Matthew J Fischer, Vinko Erceg, Bijoy Bhukania, Srikanth Gummadi
  • Publication number: 20240163919
    Abstract: A first device includes at least one processor configured to communicate with the second device using a primary channel, detect occupation on the primary channel by a third device, and communicate with the second device using a secondary channel in response to the occupation by the third device. The secondary channel is chosen from a set of channels. The set of channels being determined at least partially in response to information or parameters exchanged during association of the first device and the second device.
    Type: Application
    Filed: April 26, 2023
    Publication date: May 16, 2024
    Applicant: Avago Technologies International Sales Pte. Limited
    Inventors: Sindhu Verma, Shubhodeep Adhikari, Matthew J. Fischer, Vinko Erceg
  • Publication number: 20240163862
    Abstract: Some embodiments relate to a first device for communicating with a second device. The first device includes configured to communicate data to the second device using a resource. The resource has a bandwidth of less than a total bandwidth of a primary channel of a plurality of links, and the data is low latency data or control data.
    Type: Application
    Filed: April 26, 2023
    Publication date: May 16, 2024
    Applicant: Avago Technologies International Sales Pte. Limited
    Inventors: Sindhu Verma, Shubhodeep Adhikari, Matthew J. Fischer, Vinko Erceg
  • Publication number: 20240163774
    Abstract: A device can include a first radio configured to transmit over a first link and a second link of a first wireless band. The first radio can be configured to detect an OBSS communication on the first link of the first wireless band. The first radio can be configured to transmit over the second link of the first wireless band, responsive to the detection of the OBSS communication on the first link of the first wireless band. The device can be configured to operate as an access point (AP) for one or more stations of a wireless network.
    Type: Application
    Filed: April 26, 2023
    Publication date: May 16, 2024
    Applicant: Avago Technologies International Sales Pte. Limited
    Inventors: Sindhu Verma, Shubhodeep Adhikari, Matthew J. Fischer, Vinko Erceg, Rohit V. Gaikwad
  • Patent number: 11985073
    Abstract: A system for controlling power distribution within a vehicular communication network, including a power source equipment comprising a first port in communication with a network node module of a device, and a Power over Ethernet (POE) management module. The POE management module is configured to enable POE to the device via the first port, monitor a current draw of the device, determine whether the current draw of the device exceeds a threshold, and disable POE to the device, responsive to determining that the current draw exceeds the threshold.
    Type: Grant
    Filed: September 20, 2022
    Date of Patent: May 14, 2024
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: Nariman Yousefi, Yongbum Kim, John Walley, Xeumin Chen, Wael W. Diab, Nicholas Ilyadis
  • Patent number: 11985389
    Abstract: Systems, methods and apparatus for processing video can include a processor. The processor can be configured to perform object detection to detect visual indications of potential objects of interest in a video scene, to receive a selection of an object of interest from the potential objects of interest, and to provide enhanced video content within the video scene for the object of interest indicated by the selection.
    Type: Grant
    Filed: July 12, 2021
    Date of Patent: May 14, 2024
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: Zhijie Yang, Xuemin Chen
  • Publication number: 20240154591
    Abstract: An optical module includes an optical receiver with a complementary metal-oxide semiconductor (CMOS) transimpedance amplifier (TIA) and a digital signal processing (DSP) circuit. The DSP circuit is integrated with the CMOS TIA and facilitates adaptability of the CMOS TIA, and the CMOS TIA can adapt by using information provided by the DSP circuit.
    Type: Application
    Filed: June 15, 2023
    Publication date: May 9, 2024
    Applicant: Avago Technologies International Sales Pte. Limited
    Inventors: Jiawen Zhang, Delong Cui, Afshin Momtaz, Kun Chuai, Jun Cao
  • Publication number: 20240147233
    Abstract: Systems and methods can advantageously provide deauthentication/disassociation frames A method includes providing, by a first device, a disassociation frame or a deauthentication frame on a first primary control channel in response to an indication of a change from the first primary control channel to a second primary control channel, and receiving, by the first device, a data frame from a second network device on the first control primary channel, the second primary control channel or a secondary channel. The method also includes providing, by the first device, another disassociation frame or deauthentication frame on the first primary control channel, the second primary control channel and/or the secondary channel associated with the data frame.
    Type: Application
    Filed: March 31, 2023
    Publication date: May 2, 2024
    Applicant: Avago Technologies International Sales Pte. Limited
    Inventors: Pandiyaraja Krishnapandi, Mahesh H K Dutta, Jimut Ranjan Sahoo, Nizamudeen Mohamed Buhari, Anand Kumar Swami
  • Publication number: 20240146418
    Abstract: A laser module can include one or more lasers, an optical I/O interface, an optical receive interface, an optical transmit interface, a first optical device, and a second optical device. The first optical device is disposed between the optical I/O interface and the optical transmit interface, and the second optical device is disposed between the optical I/O interface and the optical receive interface.
    Type: Application
    Filed: October 31, 2022
    Publication date: May 2, 2024
    Applicant: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
    Inventors: John Evan Johnson, Near Margalit, David John Kenneth Meadowcroft
  • Publication number: 20240146325
    Abstract: Described herein are systems and methods related to a converter including a first input, a second input, and a number of digital to analog converter (DAC) cells. A DAC cell includes a first circuit, a first leg associated with a first output of the DAC cell, and a second leg associated with a second output of the DAC cell. The first circuit is configured to provide a return to zero operation. The DAC cell is configured to provide a data magnitude at a polarity on at least one of the first leg or the second leg during at least a portion of the clock cycle. The data magnitude and the polarity being provided in accordance with a first signal at the first input and a second signal at the second input.
    Type: Application
    Filed: October 28, 2022
    Publication date: May 2, 2024
    Applicant: Avago Technologies International Sales Pte. Limited
    Inventors: Jan MULDER, Frank VAN DER GOES, Mohammadreza MEHRPOO, Sijia WANG
  • Publication number: 20240133738
    Abstract: The present application relates generally to silicon photomultiplier (SiPM) detector arrays. In one aspect, there is a system including an array of cells each including a single-photon avalanche diode (SPAD) reverse-biased above a breakdown voltage of the SPAD. The system may further include a trigger network configured to generate pulses on a trigger line in response to SPADs of the array undergoing breakdown. The system may still further include a pulse-width filter configured to block pulses on the trigger line whose pulse width is less than a threshold width.
    Type: Application
    Filed: January 2, 2024
    Publication date: April 25, 2024
    Applicant: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
    Inventors: Thomas FRACH, Torsten SOLF, Dennis GROBEN
  • Patent number: 11968115
    Abstract: Packets in a data communications network are encapsulated by an encapsulation module on a sending computer and decapsulated on the receiver computer, the transmission of data packets being controlled by credit sent by the receiving computer to avoid causing congestion. The encapsulation module varies fields in the packets that are used by switches to determine the path to the destination, so as to distribute the load of a transfer across a plurality of paths to the receiving computer. The sending and receiving computers use per path packet delivery, loss, latency and packet trimming information to detect abnormal network behavior and submit alerts and summary statistics to a monitoring station. The monitoring station uses this information to detect network bottlenecks and other faults and to localize them to specific switches or links.
    Type: Grant
    Filed: October 31, 2021
    Date of Patent: April 23, 2024
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: Costin Raiciu, Mark James Handley
  • Patent number: 11968281
    Abstract: Various embodiments of the present disclosure improve existing multi-layer and other network technologies by routing and processing client requests that require machine learning based on the machine learning capabilities of each network device and/or other computer resource characteristics of different network devices. This ensures that network latency and throughput, among other computer resource consumption characteristics, will be improved as machine learning processing can occur at the most suitable network device or be distributed among various suitable network devices.
    Type: Grant
    Filed: September 13, 2022
    Date of Patent: April 23, 2024
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: Philippe Klein, Gordon Yong Li, Xuemin Chen
  • Publication number: 20240129502
    Abstract: In some aspects, the disclosure is directed to methods and systems for reducing memory utilization and increasing efficiency during affine merge mode for versatile video coding by utilizing motion vectors stored in a motion data line buffer for a prediction unit of a second coding tree unit neighboring a first coding tree unit to derive control point motion vectors for the first coding tree unit.
    Type: Application
    Filed: December 18, 2023
    Publication date: April 18, 2024
    Applicant: Avago Technologies International Sales Pte. Limited
    Inventor: Minhua Zhou
  • Publication number: 20240126713
    Abstract: Systems and methods of communicating use device level throttling. Some embodiments relate to a method of communicating in a network. The systems and methods can provide a first communication associated with a device for issuance, issue the first communication if a queue depth value for the device is less than an issued communication value, and listing the first communication on a pend list for the device if a queue depth value for the device is less than the issued communication value.
    Type: Application
    Filed: October 18, 2022
    Publication date: April 18, 2024
    Applicant: Avago Technologies International Sales Pte. Limited
    Inventor: Arun Prakash JANA
  • Publication number: 20240120931
    Abstract: A system includes a first circuit configured to provide a digitally pre-distorted input signal, a digital-to-analog converter including a number of unit elements, a digital input, and a digital output. Each unit element is configured to receive a reference voltage and to be controllable by a control signal provided in response to the digitally pre-distorted input signal. The digital-to-analog converter provides an analog output. The first circuit is configured to reduce distortion due to signal dependent changes to the reference voltage. The signal dependent changes can be due at least in part to current through the supply network that supplies the reference voltage. The digital to analog converter can be a voltage mode converter.
    Type: Application
    Filed: October 11, 2022
    Publication date: April 11, 2024
    Applicant: Avago Technologies International Sales Pte. Limited
    Inventors: Ahmed Elkholy, Jun Cao, Adesh Garg