Patents Assigned to Availink, Inc.
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Patent number: 8689092Abstract: A family of quasi cyclic irregular low density parity check codes for video broadcasting applications. The parity check matrices of the constructed low density parity check codes have quasi-cyclic structures to facilitate hardware implementation and have proper check/bit degree distributions to offer frame error rate performance lower than 10?7.Type: GrantFiled: September 18, 2006Date of Patent: April 1, 2014Assignee: Availink, Inc.Inventors: Fengwen Sun, Ming Yang, Juntan Zhang, Yuhai Shi
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Patent number: 8630223Abstract: A digital communications system and method to transmit and receive a digital communications signal wherein the digital signal has a plurality of frames, wherein at least two modulations are supported, and wherein each of the plurality of frames has the same number of symbols.Type: GrantFiled: February 24, 2010Date of Patent: January 14, 2014Assignee: Availink, Inc.Inventors: Ming Yang, Fengwen Sun, Fangyi She, Yimin Jiang, Guofang Sheng, Zhenliang Shi, Yingjiu Xu
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Patent number: 8369448Abstract: A digital communication system, having a transmitter to transmit a digital signal; and a receiver to receive the digital signal; wherein the digital signal utilizes a 32APSK system with FEC coding, and the signal is bit-mapped using gray mapping, and bits of the digital signal are ordered based on the values of a log likelihood ratio from a communications channel.Type: GrantFiled: September 18, 2006Date of Patent: February 5, 2013Assignee: Availink, Inc.Inventors: Juntan Zhang, Fengwen Sun
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Patent number: 8301960Abstract: An approach is provided for interleaving low density parity check (LDPC) encoded bits in 32APSK modulation systems. By assigning the bits determining modulation symbols based on different bit degrees, one can efficiently find the desirable tradeoff between error performance and error floor provided by the LDPC codes in use.Type: GrantFiled: February 22, 2010Date of Patent: October 30, 2012Assignee: Availink, Inc.Inventors: Juntan Zhang, Zhiyong Wu, Peng Gao, Fengwen Sun
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Patent number: 8230299Abstract: An approach is provided for interleaving low density parity check (LDPC) encoded bits in QPSK/8PSK modulation systems. By assigning the bits determining modulation symbols based on different bit degrees, one can efficiently find the desirable tradeoff between error performance and error floor provided by the LDPC codes in use.Type: GrantFiled: March 1, 2010Date of Patent: July 24, 2012Assignee: Availink, Inc.Inventors: Ming Yang, Juntan Zhang, Zhiyong Wu, Fengwen Sun
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Publication number: 20110258521Abstract: An approach is provided for interleaving low density parity check (LDPC) encoded bits in QPSK/8PSK modulation systems. By assigning the bits determining modulation symbols based on different bit degrees, one can efficiently find the desirable tradeoff between error performance and error floor provided by the LDPC codes in use.Type: ApplicationFiled: March 1, 2010Publication date: October 20, 2011Applicant: AVAILINK, INC.Inventors: Ming Yang, Juntan Zhang, Zhiyong Wu, Fengwen Sun
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Patent number: 8028219Abstract: An approach is provided for interleaving low density parity check (LDPC) encoded bits in 16ASPK modulation systems. By assigning the bits determining modulation symbols based on different bit degrees, one can efficiently find the desirable tradeoff between error performance and error floor provided by the LDPC codes in use.Type: GrantFiled: September 18, 2006Date of Patent: September 27, 2011Assignee: Availink, Inc.Inventors: Juntan Zhang, Peng Gao, Fengwen Sun
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Publication number: 20110202814Abstract: An approach is provided for interleaving low density parity check (LDPC) encoded bits in 32APSK modulation systems. By assigning the bits determining modulation symbols based on different bit degrees, one can efficiently find the desirable tradeoff between error performance and error floor provided by the LDPC codes in use.Type: ApplicationFiled: February 22, 2010Publication date: August 18, 2011Applicant: AVAILINK, INC.Inventors: Juntan Zhang, Zhiyong Wu, Peng Gao, Fengwen Sun
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Publication number: 20110173509Abstract: A digital communication system, having a transmitter to transmit a digital signal; and a receiver to receive the digital signal; wherein the digital signal utilizes a 16APSK system, and the signal is bit-mapped using gray mapping, and bits of the digital signal are ordered based on the values of a log likelihood ratio from a communications channel.Type: ApplicationFiled: March 4, 2010Publication date: July 14, 2011Applicant: AVAILINK, INC.Inventors: Juntan Zhang, Xunchun Li, Fengwen Sun
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Publication number: 20110096718Abstract: A digital communications system and method to transmit and receive a digital communications signal wherein the digital signal has a plurality of frames, wherein at least two modulations are supported, and wherein each of the plurality of frames has the same number of symbols.Type: ApplicationFiled: February 24, 2010Publication date: April 28, 2011Applicant: AVAILINK, INC.Inventors: Ming YANG, Fengwen SUN, Fangyi SHE, Yimin JIANG, Guofang SHENG, Zhenliang SHI, Yingjiu XU
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Publication number: 20100316144Abstract: A digital communication system and method using a digital signal having a plurality of frames to transmit data, including a first frame and a second frame, wherein each of the plurality of frames has a frame structure; and wherein the first frame has, a plurality of codewords comprising user data, and a Next Frame Composition Table to set the structure for the second frame, and wherein the second frame has at least one codeword.Type: ApplicationFiled: April 30, 2010Publication date: December 16, 2010Applicant: AVAILINK, INC.Inventors: Fengwen Sun, Ming Yang, Yimin Jiang, Guofang Sheng, Zhenliang Shi, Yingjiu Xu