Patents Assigned to Avary Holding (Shenzhen) Co., Limited.
  • Patent number: 11902644
    Abstract: A camera module includes a holder, a lens in the holder, magnets disposed on an outer wall of the holder, and a circuit board assembly. The circuit board assembly includes an outer wiring substrate, and first and second inner wiring substrates spaced out on a surface of the outer wiring substrate. The first inner wiring substrate surrounds the holder and includes a first dielectric layer and a first inner wiring layer thereon. The first inner wiring layer includes coils of wound wire in the first inner wiring layer, and each of the coils corresponds to one of the magnets. The second inner wiring substrate includes a second inner wiring layer, a thickness of each of the coils is greater than a thickness of the second inner wiring layer. A method for manufacturing the camera module is also disclosed.
    Type: Grant
    Filed: February 28, 2022
    Date of Patent: February 13, 2024
    Assignees: QING DING PRECISION ELECTRONICS (HUAIAN) CO., LTD, Avary Holding (Shenzhen) Co., Limited.
    Inventors: Jun Dai, Mei Yang, Ming-Jaan Ho
  • Patent number: 11871526
    Abstract: A circuit board includes a substrate, a first circuit layer, a second circuit layer, and a third circuit layer. The substrate includes a base layer, a first metal layer formed on the base layer, and a seed layer formed on the first metal layer. The first circuit layer is located on the substrate and includes the first metal layer and a signal layer formed on a surface of the first metal layer. The second circuit layer is coupled to the first circuit layer and includes the first metal layer, the seed layer, and a connection pillar formed on a surface of the first metal layer and the seed layer. The third circuit layer is coupled to the second circuit layer and includes the seed layer and a coil formed on a surface of the seed layer.
    Type: Grant
    Filed: February 16, 2022
    Date of Patent: January 9, 2024
    Assignees: HongQiSheng Precision Electronics (QinHuangDao) Co., Ltd., Avary Holding (Shenzhen) Co., Limited.
    Inventor: Jun Dai
  • Patent number: 11864329
    Abstract: A method for manufacturing a fan-out chip packaging structure with decreased use of a crack-inducing hot-soldering process includes a first carrier plate with first and a second outer wiring layers. Two first conductive posts are formed on the first outer wiring layer, one end of each post is electrically connected to the first outer wiring layer. A receiving groove is formed between first conductive posts, and a sidewall of each post is surrounded by a first insulating layer. An embedded component is laid in the receiving groove and a second carrier plate is formed on the first insulating layer, wherein the second carrier plate carries third and fourth outer wiring layers. A first outer component is connected to the second outer wiring layer, and a second outer component is connected to the fourth outer wiring layer.
    Type: Grant
    Filed: May 25, 2022
    Date of Patent: January 2, 2024
    Assignees: HongQiSheng Precision Electronics (QinHuangDao) Co., Ltd., Avary Holding (Shenzhen) Co., Limited.
    Inventors: Chih-Chieh Fu, Yuan-Yu Lin, Ze-Jie Li
  • Patent number: 11778752
    Abstract: A method for manufacturing a circuit board (100) includes: providing a first single-sided circuit substrate (20) including an insulating base layer (11) and a circuit layer (13); forming first conductive posts (111) electrically connected to the circuit layer (13) in the insulating base layer (11) to obtain a second single-sided circuit substrate (13); providing a first adhesive layer (40), forming second conductive posts (401); providing one second single-sided circuit substrate (30), defining a receiving groove (31) to obtain a third single-sided circuit substrate (50); providing another first single-sided circuit substrate (20), mounting an electronic component (14) on the circuit layer (13) to obtain a surface mounted circuit substrate (60); stacking the first single-sided circuit substrate (20), the first adhesive layer (40), the second single-sided circuit substrate (30), at least one of the third single-sided circuit substrate (50), and the surface mounted circuit substrate (60) in that order; pressing
    Type: Grant
    Filed: January 21, 2020
    Date of Patent: October 3, 2023
    Assignees: Avary Holding (Shenzhen) Co., Limited., HongQiSheng Precision Electronics (QinHuangDao) Co., Ltd.
    Inventors: Hsiao-Ting Hsu, Ming-Jaan Ho, Fu-Yun Shen
  • Patent number: 11765818
    Abstract: A method for manufacturing a circuit board comprising: providing an inner circuit substrate board comprising a first transmission area, a bendable area, and a second transmission area which are connected in an order, wherein the inner circuit substrate board further comprises a substrate layer and an inner circuit layer on the substrate layer, the inner circuit layer comprises a first signal circuit; pressing a first outer circuit substrate board on the inner circuit layer; wherein the first outer circuit substrate board comprises a first dielectric layer formed on the inner circuit layer and a first outer circuit layer formed on the first dielectric layer; the first dielectric layer is located in the first transmission area and the second transmission area; two ends of the first signal circuit are electrically connected to the first outer circuit layer.
    Type: Grant
    Filed: January 12, 2022
    Date of Patent: September 19, 2023
    Assignees: Avary Holding (Shenzhen) Co., Limited., QING DING PRECISION ELECTRONICS (HUAIAN) CO., LTD
    Inventors: Fu-Yun Shen, Wen-Zhu Wei, Ming-Jaan Ho
  • Patent number: 11757080
    Abstract: The present invention relates to a multi-sided light-emitting circuit board, which includes: a transparent substrate layer and a first conductive circuit layer on at least one surface of the transparent substrate layer. The first conductive circuit layer includes conductive portions arranged at intervals. A metal piece is formed on a surface of each conductive portion away from the transparent substrate layer. An accommodation space is formed between adjacent metal pieces. The accommodation space is provided with a light-emitting chip. Each light-emitting chip includes two electrodes. The two electrodes are respectively located at opposite ends of the light-emitting chip. The electrodes are respectively electrically connected to adjacent metal pieces. An encapsulant layer is formed on a surface of the first conductive circuit layer. The encapsulant layer covers and encapsulates the metal pieces and the light-emitting chips.
    Type: Grant
    Filed: November 27, 2019
    Date of Patent: September 12, 2023
    Assignees: Avary Holding (Shenzhen) Co., Limited., QING DING PRECISION ELECTRONICS (HUAIAN) CO., LTD
    Inventors: Zu-Ai Li, Mei-Hua Huang, Jin-Cheng Wu, Si-Hong He, Ning Hou
  • Patent number: 11754781
    Abstract: A circuit board utilizing the better and faster performance of optical signals includes interconnected first, second, and third areas. The first area includes a first circuit substrate, and a first coupling element and a chip connected thereon. The second area includes an optical fiber within an insulating layer. The third area includes a second circuit substrate, and a second coupling element and an electronic element connected thereon. The first coupling element and the second coupling element are optically aligned with the optical fiber for signal reception and transmission. A method for manufacturing such composite circuit board is also disclosed.
    Type: Grant
    Filed: May 26, 2021
    Date of Patent: September 12, 2023
    Assignees: Avary Holding (Shenzhen) Co., Limited., QING DING PRECISION ELECTRONICS (HUAIAN) CO..LTD, GARUDA TECHNOLOGY CO., LTD.
    Inventor: Wei-Liang Wu
  • Patent number: 11744004
    Abstract: A circuit board includes a first outer wiring layer, a circuit substrate, and a second outer wiring layer stacked. The circuit substrate includes a first inner wiring layer, an insulating layer, and a second inner wiring layer stacked. A plurality of thermally conductive pillars is arranged at intervals on the first inner wiring layer, a liquid storage space is formed between every two adjacent thermally conductive pillars, and a thermally conductive agent is received in the liquid storage space. The first outer wiring layer is formed on the plurality of thermally conductive pillars. The second outer wiring layer is formed the second inner wiring layer. A first groove penetrates the second outer wiring layer, the second inner wiring layer and the insulating layer, exposes a portion of the first inner wiring layer, and corresponds to the thermally conductive pillars. At least one heating element is installed in the first groove.
    Type: Grant
    Filed: September 2, 2021
    Date of Patent: August 29, 2023
    Assignees: QING DING PRECISION ELECTRONICS (HUAIAN) CO., LTD, Avary Holding (Shenzhen) Co., Limited., GARUDA TECHNOLOGY CO., LTD.
    Inventor: Wei-Xiang Li
  • Patent number: 11699671
    Abstract: A packaged antenna circuit structure suitable for 5G use includes a shielding layer, an electronic component, conductive pillars, a first insulation layer, a first stacked structure, an antenna structure, and a second stacked structure. The shielding layer defines a groove to receive the electronic component. The conductive pillars on the shielding layer surround the groove. The first insulation layer covers the shielding layer, the electronic component, and the conductive pillars. The first stacked structure is stacked on a side of the first insulation layer and includes a ground line connecting to the conductive pillars. The antenna structure is stacked on a side of the first stacked structure away from the first insulation layer and connected to the electronic component by the first stacked structure. The second stacked structure is stacked on a side of the first insulation layer away from the first stacked structure.
    Type: Grant
    Filed: April 1, 2022
    Date of Patent: July 11, 2023
    Assignees: Avary Holding (Shenzhen) Co., Limited., QING DING PRECISION ELECTRONICS (HUAIAN) CO., LTD
    Inventors: Yong-Chao Wei, Jia-He Li
  • Patent number: 11700685
    Abstract: A circuit board with reduced dielectric losses enabling the movement of high frequency signals includes an inner circuit board and two outer circuit boards. The inner circuit board includes a first conductor layer and a first substrate layer. The first conductor layer includes a signal line and two ground lines on both sides of the signal line. The first substrate layer covers a side of the first conductor layer and defines first through holes which expose the signal line. Each outer circuit board includes a second substrate layer and a second conductor layer. The second substrate layer abuts the inner circuit board and defines second through holes which are not aligned with the first through holes, partially surrounding the signal line with air which has a very low dielectric constant. A method for manufacturing the high-frequency circuit board is also disclosed.
    Type: Grant
    Filed: October 28, 2021
    Date of Patent: July 11, 2023
    Assignees: Avary Holding (Shenzhen) Co., Limited., QING DING PRECISION ELECTRONICS (HUAIAN) CO., LTD
    Inventors: Fu-Yun Shen, Xian-Qin Hu
  • Patent number: 11700698
    Abstract: A method for manufacturing a circuit board comprises: a first single-sided board and an insulating structure are provided. The first single-sided board is pressed to the insulating structure and covers opposite side surfaces of the insulating structure to form a first laminated board. A second single-sided board and a third single-sided board are provided. The second single-sided board is pressed to the third single-sided board and covers opposite side walls of the third single-sided board to form a second laminated board. An inner wiring layer is formed by the second laminated board. The second laminated board with the inner wiring layer and the first laminated board are pressed to form an intermediate structure. Outer wiring layers are formed by the intermediate structure. Covering films are formed on surfaces of the outer wiring layers. Electromagnetic interference shielding layers are formed on the covering films.
    Type: Grant
    Filed: March 4, 2022
    Date of Patent: July 11, 2023
    Assignees: HongQiSheng Precision Electronics (QinHuangDao) Co., Ltd., Avary Holding (Shenzhen) Co., Limited.
    Inventors: Hao-Yi Wei, Yan-Lu Li
  • Patent number: 11696393
    Abstract: A method for manufacturing a circuit board is disclosed. An inner wiring base board with a first opening is provided. A base board is fixed in the first opening, and a first wiring base board and a second wiring base board are pressed on opposite surfaces of the inner wiring base board. The base board is made of ceramic and has a high light reflectivity of 92% to 97%. A first conductor layer and a second conductor layer are formed on opposite surfaces of the laminated structure. The first conductor layer includes a plurality of connecting pads on the base board. A solder mask is formed on an outer side of the first conductor layer, the solder mask has a high light reflectivity of 92% to 95%, and the base board is exposed outside the solder mask.
    Type: Grant
    Filed: March 23, 2022
    Date of Patent: July 4, 2023
    Assignees: QING DING PRECISION ELECTRONICS (HUAIAN) CO., LTD, Avary Holding (Shenzhen) Co., Limited.
    Inventors: Jin-Cheng Wu, Mei-Hua Huang, Ning Hou, Hua-Ning Wang, Qiang Song, Rong-Chao Li
  • Patent number: 11672100
    Abstract: A heat equalization plate includes a first copper clad laminate including a first copper foil, a second copper clad laminate including a second copper foil, a connecting bump, a plurality of thermally conductive bumps, and a working fluid. The second copper foil faces the first copper foil. The connecting bump is formed on a surface of the first copper foil facing the second copper foil. The thermally conductive bumps are formed on a surface of the first copper foil facing the second copper foil. The connecting bump is an annulus and surrounds the thermally conductive bumps. The connecting bump is connected to the second copper foil to form a sealed chamber. The thermally conductive bumps are received in the sealed chamber. The working fluid is received in the sealed chamber. The present invention also needs to provide a method for manufacturing the heat equalization plate.
    Type: Grant
    Filed: December 4, 2020
    Date of Patent: June 6, 2023
    Assignees: Avary Holding (Shenzhen) Co., Limited., QING DING PRECISION ELECTRONICS (HUAIAN) CO., LTD
    Inventors: Fu-Yun Shen, Hsiao-Ting Hsu, Ming-Jaan Ho
  • Patent number: 11672083
    Abstract: A composite circuit board includes a composite circuit board unit, a first solder mask formed on a first metal protection layer of the composite circuit board unit, and a second solder mask formed on a second metal protection layer of the composite circuit board unit. Two ends of a first outer conductive circuit are bent back toward each other and spaced apart a predetermined distance to form a first window. Two ends of a second outer conductive circuit are bent back toward each other and spaced apart a predetermined distance to form a second window.
    Type: Grant
    Filed: October 8, 2021
    Date of Patent: June 6, 2023
    Assignees: HongQiSheng Precision Electronics (QinHuangDao) Co., Ltd., Avary Holding (Shenzhen) Co., Limited.
    Inventors: Yang Li, Yan-Lu Li
  • Patent number: 11665833
    Abstract: A circuit board includes at least two circuit board units stacked together. Each circuit board unit includes a substrate and a circuit layer. The substrate defines a conductive hole penetrating therethrough. The conductive hole provided with a conductor therein. One side of the substrate further defines a groove, the groove including a concave portion aligned with the conductive hole. The circuit layer includes a connection pad located in the concave portion. The connection pad is shaped as a conductive protrusion, which surrounds and is electrically connected to the conductor. The circuit layer is located in the groove, and the conductive hole is electrically connecting the circuit layers of the circuit board units.
    Type: Grant
    Filed: November 16, 2021
    Date of Patent: May 30, 2023
    Assignees: QING DING PRECISION ELECTRONICS (HUAIAN) CO., LTD, Avary Holding (Shenzhen) Co., Limited.
    Inventors: Ming-Jaan Ho, Xian-Qin Hu, Fu-Yun Shen, Hsiao-Ting Hsu, Yong-Chao Wei
  • Patent number: 11665831
    Abstract: A method for manufacturing a circuit board with nickel resistor embedded therein provides a copper substrate, the copper substrate includes a copper foil. A nickel resistance layer is formed on the copper foil. A first dielectric layer and a first copper layer are formed on the nickel resistance layer. The copper foil and the first copper layer are etched to form a first conductive wiring layer and a second conductive wiring layer respectively, the nickel layer not being subjected to an etching process, to obtain the finished circuit board.
    Type: Grant
    Filed: September 22, 2020
    Date of Patent: May 30, 2023
    Assignees: HongQiSheng Precision Electronics (QinHuangDao) Co., Ltd., Avary Holding (Shenzhen) Co., Limited.
    Inventors: Jian Wang, Mei Yang
  • Patent number: 11665820
    Abstract: Disclosure provides an adapter board and a method for making the adapter board, which includes providing a mold in which a plurality of first fixing plates and second fixing plates are provided, providing a plurality of wires sequentially passed through the plurality of first fixing plates and the second fixing plate, injecting a non-conductive material into the cavity to form a body, and cutting the body along both sides of the first fixing plates and the second fixing plates to obtain a plurality of board bodies. The first fixing plates are provided with a plurality of first fixing holes, and the second fixing plates are provided with a plurality of second fixing holes. The board body includes a first surface and a second surface. A plurality of first connection pads are formed on the first surface, and a plurality of second connection pads are formed on the second surface.
    Type: Grant
    Filed: November 29, 2021
    Date of Patent: May 30, 2023
    Assignees: QING DING PRECISION ELECTRONICS (HUAIAN) CO., LTD, Avary Holding (Shenzhen) Co., Limited.
    Inventors: Man-Zhi Peng, Rui-Wu Liu, Ming-Jaan Ho
  • Patent number: 11647592
    Abstract: A system for effectively curing dry film ink throughout its thickness on circuit boards being made applies an exposure system, a circuit board, and a method for making the circuit board. The exposure system includes a plurality of mixed light sources with different wavelengths within a range of 365 nm to 440 nm, the mixed light sources can output at least three different wavelengths of light each of substantially a single wavelength and a fourth source of light able to output light of a spectrum of wavelengths, the ranges of light being between 365 nm and 440 nm.
    Type: Grant
    Filed: April 23, 2021
    Date of Patent: May 9, 2023
    Assignees: QING DING PRECISION ELECTRONICS (HUAIAN) CO., LTD, Avary Holding (Shenzhen) Co., Limited.
    Inventors: Ching-Lung Chuang, I-Hsin Chen, Li-Jen Chang
  • Patent number: 11627668
    Abstract: A circuit board includes a circuit substrate, a solder, and a surrounding portion. The circuit substrate includes a connecting pad. The solder is formed on a surface of the connecting pad. The surrounding portion is formed on the surface of the connecting pad and cooperates with the connecting pad to form a groove receiving the solder. The surrounding portion surrounds the solder and is spaced from the solder. A method for manufacturing a circuit board is also provided.
    Type: Grant
    Filed: May 26, 2021
    Date of Patent: April 11, 2023
    Assignees: Avary Holding (Shenzhen) Co., Limited., HongQiSheng Precision Electronics (QinHuangDao) Co., Ltd., GARUDA TECHNOLOGY CO., LTD.
    Inventors: Yong-Chao Wei, Po-Yuan Chen
  • Patent number: 11617263
    Abstract: A method for manufacturing a circuit board embeds a portion of an outer circuit layer in an outer dielectric layer which increases contact area between the outer circuit layer and the outer dielectric layer, improving adhesion between the outer circuit layer and the outer dielectric layer, and reducing a thickness of the outer circuit substrate, thereby reducing the overall thickness of the finished circuit board.
    Type: Grant
    Filed: May 31, 2021
    Date of Patent: March 28, 2023
    Assignees: Avary Holding (Shenzhen) Co., Limited., HongQiSheng Precision Electronics (QinHuangDao) Co., Ltd., GARUDA TECHNOLOGY CO., LTD.
    Inventors: Lin-Jie Gao, Yong-Chao Wei