Patents Assigned to Avnera Corporation
  • Patent number: 10283103
    Abstract: The disclosure includes an acoustic processing network comprising a Digital Signal Processor (DSP) operating at a first frequency and a Real-Time Acoustic Processor (RAP) operating at a second frequency higher than the first frequency. The DSP receives a noise signal from at least one microphone. The DSP then generates a noise filter based on the noise signal. The RAP receives the noise signal from the microphone and the noise filter from the DSP. The RAP then generates an anti-noise signal based on the noise signal and the noise filter for use in Active Noise Cancellation (ANC).
    Type: Grant
    Filed: March 9, 2018
    Date of Patent: May 7, 2019
    Assignee: AVNERA CORPORATION
    Inventor: Amit Kumar
  • Patent number: 10263629
    Abstract: The disclosure includes an analog to digital converter (ADC) comprising a successive approximation register (SAR) unit including a capacitive network to take a sample of an analog signal and a comparator to approximate a digital value based on the analog signal sample via successive comparison. The disclosure also includes a programmable sequencer. The sequencer includes a control memory containing control signal states indicating control signals to operate the SAR unit. The sequencer also includes a program memory including sequence instructions defining a duty cycle for the SAR unit by referencing the control signal states in the control memory. The sequencer also includes a processing circuit to apply control signals according to the control signal states in an order defined by the sequence instructions to manage a sequence of operations at the SAR unit according to the duty cycle to control the ADC.
    Type: Grant
    Filed: May 29, 2018
    Date of Patent: April 16, 2019
    Assignee: AVNERA CORPORATION
    Inventors: Jianping Wen, Gordon Ueki
  • Patent number: 10261537
    Abstract: A start-up circuit for a bandgap reference voltage generator circuit, including a first native transistor with a drain connected to a supply voltage of the bandgap reference voltage generator circuit and a source connected to a gate of the first native transistor; a low voltage transistor with a source connected to ground, a drain connected to the source of the first native transistor, and a gate connected to a resistor; a second native transistor with a source connected to the resistor, a gate connected to the source of the first native transistor; a high voltage transistor with a drain connected to a drain of the second native transistor and a source connected to the supply voltage; and a transistor with a gate connected to the gate of the first high voltage transistor and a drain which provides a start-up current for the bandgap reference voltage generator circuit.
    Type: Grant
    Filed: April 17, 2018
    Date of Patent: April 16, 2019
    Assignee: AVNERA CORPORATION
    Inventor: Christopher D. Nilson
  • Patent number: 10243579
    Abstract: The disclosure includes a successive approximation register (SAR) analog to digital converter (ADC). The SAR ADC includes a sampling network to store a sample of an analog signal. The SAR ADC also includes a comparator to successively compare the sample to reference values to determine a digital value corresponding to the sample of the analog signal. The comparator employs a plurality of comparator preamplifiers. The comparator also includes a programmable trim filter. The programmable trim filter is selectively set to adjust a bandwidth of the comparator preamplifiers to a bandwidth value corresponding with a preamplifier settling time subceeding a preamplifier settling threshold.
    Type: Grant
    Filed: December 5, 2017
    Date of Patent: March 26, 2019
    Assignee: AVNERA CORPORATION
    Inventors: Wai Lee, Garry N. Link
  • Patent number: 10231047
    Abstract: A headphone detector including a headphone and a processor. The headphone has a microphone and a speaker, and the microphone is configured to generate an audio signal based on an output of the speaker. The processor is configured to receive the audio signal, determine a characteristic of the audio signal, and assess whether the headphone is on ear or off ear based on a comparison of the characteristic to a threshold. The threshold corresponds to one or more of an audio response of the audio signal at a corresponding frequency and an audio response of a feedback microphone signal at a corresponding frequency, under one or more known conditions.
    Type: Grant
    Filed: April 5, 2018
    Date of Patent: March 12, 2019
    Assignee: Avnera Corporation
    Inventors: Amit Kumar, Eric Sorensen, Shankar Rathoud
  • Patent number: 10230343
    Abstract: A Class G amplifier system including a processing unit configured to receive an input signal and output a delayed processed input signal, a class G amplifier configured to receive the delayed processed input signal, and a power supply. The power supply includes a regulator configured to operate in a plurality of configurations, each configuration outputs a different supply voltage to the class G amplifier and a control circuit configured to receive the input signal and determine the supply voltage required from the regulator when the delayed processed input signal is received at the class G amplifier, and output a signal to the regulator to indicate the required configuration for the required supply voltage.
    Type: Grant
    Filed: December 29, 2017
    Date of Patent: March 12, 2019
    Assignee: AVNERA CORPORATION
    Inventors: Garry N. Link, Eric King, Xudong Zhao, Wai Lee, Alexander C. Stange, Amit Kumar
  • Patent number: 10230352
    Abstract: Embodiments of the invention may be used to implement a rate converter that includes: 6 channels in forward (audio) path, each channel having a 24-bit signal path per channel, an End-to-end SNR of 110 dB, all within the 20 Hz to 20 KHz bandwidth. Embodiment may also be used to implement a rate converter having: 2 channels in a reverse path, such as for voice signals, 16-bit signal path per channel, an End-to-end SNR of 93 dB, all within 20 Hz to 20 KHz bandwidth. The rate converter may include sample rates such as 8, 11.025, 12, 16, 22.05, 24, 32 44.1, 48, and 96 KHz. Further, rate converters according to embodiments may include a gated clock in low-power mode to conserve power.
    Type: Grant
    Filed: October 17, 2017
    Date of Patent: March 12, 2019
    Assignee: AVNERA CORPORATION
    Inventor: Xudong Zhao
  • Patent number: 10224952
    Abstract: Embodiments of the invention include an oversampling Analog to Digital Converter that uses uneven non-overlapping clock phases to reduce switched capacitor circuit power consumption. A return-to-zero sub phase of one of the clock phases may also be used for feedback reference capacitors. A delay lock loop may be combined with the non-overlapping clock phase generator to control accurate timing.
    Type: Grant
    Filed: April 18, 2017
    Date of Patent: March 5, 2019
    Assignee: AVNERA CORPORATION
    Inventors: Jianping Wen, Ali Hadiashar, Eric King, David Entrikin, Wai Lang Lee
  • Patent number: 10198239
    Abstract: A speaker system includes a case, an audio input, speakers, an accelerometer, and a computer processor. The audio input is structured to receive a program audio signal from an audio device. The speakers are configured to play an audio output based on the program audio signal, the audio output causing a vibration of the case. The accelerometer is configured to detect the vibration of the case as well as a user tap on the case. The computer processor is configured to identify a user gesture that includes the tap on the case, to identify the tap apart from the case vibration by processing the detected vibration of the case and the detected user tap on the case based on information from the program audio signal to separate the detected user tap from the detected vibration, and to commence a particular function associated with the user gesture.
    Type: Grant
    Filed: March 27, 2017
    Date of Patent: February 5, 2019
    Assignee: Avnera Corporation
    Inventors: Manpreet S. Khaira, Shawn O'Connor, Frank Prestrelski, Patrick Allen Quinn, Richard Andrew Sorensen, Eric Sorensen
  • Patent number: 10200776
    Abstract: Disclosed is a signal processor for headphone off-ear detection. The signal processor includes an audio output to transmit an audio signal toward a headphone speaker in a headphone cup. The signal processor also includes a feedback (FB) microphone input to receive a FB signal from a FB microphone in the headphone cup. The signal processor also includes an off-ear detection (OED) signal processor to determine an audio frequency response of the FB signal over an OED frame as a received frequency response. The OED processor also determines an audio frequency response of the audio signal times an off-ear transfer function between the headphone speaker and the FB microphone as an ideal off-ear response. A difference metric si generated comparing the received frequency response to the ideal off-ear frequency response. The difference metric is employed to detect when the headphone cup is disengaged from an ear.
    Type: Grant
    Filed: May 18, 2018
    Date of Patent: February 5, 2019
    Assignee: AVNERA CORPORATION
    Inventors: Amit Kumar, Shankar Rathoud, Mike Wurtz, Eric Etheridge, Eric Sorensen
  • Patent number: 10182160
    Abstract: A portable speakerphone having a housing, a receiving transducer, an electrical cable, a transmitting transducer, and a processor. The receiving transducer is affixed to the housing and is configured to receive a first electrical signal from a mobile device. The electrical cable is coupled to and extends from the housing. The transmitting transducer is affixed to the electrical cable, remote from the housing. Also, the transmitting transducer is configured to transmit a second electrical signal, and the second electrical signal is based in part on the first electrical signal. The processor is configured to suppress acoustic echo by modifying the second electrical signal. The processor is also configured to output the modified second electrical signal to the mobile device. A related method is also disclosed.
    Type: Grant
    Filed: November 17, 2016
    Date of Patent: January 15, 2019
    Assignee: Avnera Corporation
    Inventors: Eric Sorensen, Thomas Irrgang, Mike Wurtz
  • Patent number: 10177779
    Abstract: The disclosure includes an analog to digital converter (ADC). The ADC includes a comparator to compare sample values of an analog signal in an analog domain to reference values to determine digital values in a digital domain. The digital values correspond to the analog signal and may be determined according to successive approximation. The ADC also includes chop switches to modulate the analog signal to increase a frequency of flicker noise in the analog domain. The ADC also includes an un-chop switch to demodulate the digital values in the digital domain prior filtration of the flicker noise by a digital filter.
    Type: Grant
    Filed: December 20, 2017
    Date of Patent: January 8, 2019
    Assignee: AVNERA CORPORATION
    Inventors: Wai Lee, Garry N. Link, Jianping Wen
  • Patent number: 10158373
    Abstract: The disclosure includes a mechanism for mitigating charge related disturbances in a Successive Approximation Register (SAR) Analog to Digital Converter (ADC) by providing a fine reference connection and a rough reference connection. A switch array is activated to couple a current bit capacitor of a capacitor array to the rough reference connection while a current bit corresponding to the current bit capacitor is determined by a comparator. The switch array is further activated to couple a previous bit capacitor of the capacitor array to the fine reference connection while the current bit capacitor is coupled to the rough reference connection. This separates charge flow on the rough reference connection from capacitors coupled to the fine reference connection.
    Type: Grant
    Filed: December 20, 2017
    Date of Patent: December 18, 2018
    Assignee: AVNERA CORPORATION
    Inventors: Wai Lee, Jianping Wen, Garry N. Link
  • Patent number: 10148280
    Abstract: The disclosure includes a mechanism for mitigating electrical current leakage in a Successive Approximation Register (SAR) Analog to Digital Converter (ADC) by using a Flash ADC in conjunction with the SAR ADC. A sequence controller in the SAR ADC uses the output of the Flash ADC to control a switch array. Depending on the output of the Flash ADC, the sequence controller can control the switch array to couple at least one capacitor in the capacitor network of the SAR ADC to a voltage that reduces charge leakage in the SAR ADC. The voltage may be a pre-defined positive or negative reference voltage.
    Type: Grant
    Filed: December 23, 2017
    Date of Patent: December 4, 2018
    Assignee: Avnera Corporation
    Inventors: Wai Lee, Jianping Wen, Garry N. Link
  • Patent number: 10142734
    Abstract: A method for re-forming a complete ring network of a plurality of Bluetooth® speakers, after a speaker has left an original ring of speakers, the method including detecting that the speaker has left the ring, and reestablishing the ring without the departed speaker. The detection may include a timeout detection if the speaker left without notice, or include receiving notice that the speaker intends to leave.
    Type: Grant
    Filed: June 12, 2018
    Date of Patent: November 27, 2018
    Assignee: AVNERA CORPORATION
    Inventors: Theodore Hetke, John Speth
  • Patent number: 10135455
    Abstract: A system can include an analog input port; a digital output port; and a successive approximation register (SAR) analog-to-digital converter (ADC). The SAR ADC can include a voltage comparator Vd having a first input, a second input, and an output; a first plurality of capacitors Cp[0:n] that are coupled with the analog input port and each have a top plate and a bottom plate; a second plurality of capacitors Cn[0:n] that are coupled with the analog input port and each have a top plate and a bottom plate; and a SAR controller coupled between the output of the voltage comparator Vd and the digital output port.
    Type: Grant
    Filed: October 31, 2017
    Date of Patent: November 20, 2018
    Assignee: Avnera Corporation
    Inventors: Jianping Wen, Garry Link, Wai Laing Lee
  • Patent number: 10133293
    Abstract: A circuit can have a low mirror input voltage and fast settling while providing a large current mirror gain. The circuit can include a current source, a first current mirror device having a first transistor and a second transistor and electrically coupled with the current source, a third transistor electrically coupled with the first transistor, a second current mirror device having a fourth transistor and a fifth transistor and electrically coupled between the third transistor and the second transistor, and an output device electrically coupled with the first and second current mirror devices.
    Type: Grant
    Filed: December 22, 2017
    Date of Patent: November 20, 2018
    Assignee: Avnera Corporation
    Inventors: Garry N. Link, Wai Lee
  • Patent number: 10135406
    Abstract: A new compensation system for an audio input reduces noise by matching feedback ratios in the positive and negative paths. A variable resistance network allows for fine control of resistance trimming in one of the signal paths, which allows for compensation between tolerance of resistors that are external to an integrated circuit and those that are internal to the integrated circuit.
    Type: Grant
    Filed: December 20, 2016
    Date of Patent: November 20, 2018
    Assignee: Avnera Corporation
    Inventors: Ali Hadiashar, Wai Laing Lee
  • Patent number: 10096312
    Abstract: An adaptive noise canceling system can include a noise cancellation processor having an audio input for receiving an input audio signal, a microphone input structured to receive one or more microphone signals from a monitored environment, and a filter processor structured to produce a filtering function based on one or more filter parameters. The system can also include an adaptivity processor structured to change the one or more filter parameters in the noise cancellation processor based on a changing operating environment of the adaptive noise canceling system.
    Type: Grant
    Filed: August 22, 2017
    Date of Patent: October 9, 2018
    Assignee: AVNERA CORPORATION
    Inventors: Amit Kumar, Wai Laing Lee, Jianping Wen
  • Patent number: 10049653
    Abstract: A system including an automatic noise canceling (ANC) headphone and a processor. The ANC headphone has a microphone configured to generate a microphone signal and at least two non-zero ANC gain levels. The processor is configured to receive the microphone signal, determine a characteristic of the microphone signal, identify a revised ANC level from the ANC gain levels based on a comparison of the characteristic to at least one threshold, and output a signal corresponding to the revised ANC level. Methods are also disclosed.
    Type: Grant
    Filed: October 14, 2016
    Date of Patent: August 14, 2018
    Assignee: AVNERA CORPORATION
    Inventors: Amit Kumar, Eric Sorensen