Abstract: A novel fault-tolerance technique for protecting against and correcting errors in packet data stream flow, preferably through not exclusively with closed ring sequential address generators and the like, through the use of pairs of independent but linked packet data flow paths enabling discarding of error data occurring in one path and substituting therefor corresponding correct data from the other path to enable continuation of the data stream flow without interruption and without error.

Abstract: A novel scalable-port non-blocking shared-memory output-buffered variable length queued data switching method and apparatus wherein successive data in each of a plurality of queues of data traffic is distributed to corresponding cells of each of successive memory channels in striped fashion across a shared memory space.

Abstract: A method of and operating architectural enhancement for combining photonic and data packet-based networks to be unified or integrated as a single device and with a common software control plane, enabling increased utilization of such combined networks and in particular of optical path data flow capacity.

Abstract: A sequential data packet addressing technique and system, particularly adapted for shared memory output-buffered switch fabrics and related memories, using a ring of successive subaddress generators each assigning addresses for predetermined size data byte packets received in successive time slots, and creating therefrom super packets ordered based on arrival time; and sequentially allocating memory therefor in the shared memory without overlap among the packets and with no holes between adjacent packets, and assigning addresses for the individual packets in the super packets upon the assigning of an address in the memory for each super packet.

Abstract: A novel fault-tolerance technique for protecting against and correcting errors in packet data stream flow, preferably through not exclusively with closed ring sequential address generators and the like, through the use of pairs of independent but linked packet data flow paths enabling discarding of error data occurring in one path and substituting therefor corresponding correct data from the other path to enable continuation of the data stream flow without interruption and without error.

Abstract: A method of and operating architectural enhancement for combining photonic and data packet-based networks to be unified or integrated as a single device and with a common software control plane, enabling increased utilization of such combined networks and in particular of optical path data flow capacity.

Abstract: A sequential data packet addressing technique and system, particularly adapted for shared memory output-buffered switch fabrics and related memories, using a ring of successive subaddress generators each assigning addresses for predetermined size data byte packets received in successive time slots, and creating therefrom super packets ordered based on arrival time; and sequentially allocating memory therefor in the shared memory without overlap among the packets and with no holes between adjacent packets, and assigning addresses for the individual packets in the super packets upon the assigning of an address in the memory for each super packet.

Abstract: A novel scalable-port non-blocking shared-memory output-buffered variable length queued data switching method and apparatus.

Abstract: A novel array of optically and electrically interacting optical MEMS dies physically and electrically integrally attached upon an optically transmissive preferably (transparent) printed circuit substrate that is monolithically formed with one or more optical components, such as lenses, for providing fixed optical path alignment and interaction therebetween, and with provision for the integration also of active optical components such as lasers and photodiodes and the like.

Abstract: A novel optical-electrical MEMS device overlaid or covered with an optically transmissive substrate held spaced in inverted preferably flip-chip bonded fashion to the device, with transparent electrodes provided in the substrate for generating an upper mirror-actuating field to supplemental the customary lower mirror-well field, enabling complementary operation.

Abstract: A novel array of optically and electrically interacting optical MEMS dies physically and electrically integrally attached upon an optically transmissive preferably (transparent) printed circuit substrate that is monolithically formed with one or more optical components, such as lenses, for providing fixed optical path alignment and interaction therebetween, and with provision for the integration also of active optical components such as lasers and photodiodes and the like.

Abstract: A novel optical path switching system, architecture and technique wherein light beam data traffic is to be switched by MEMS mirrors between source and destination nodes, and test ports are used to set up optical paths even before the real data traffic is propagated, with a combination of an electrical mirror-sensing feedback loop for controlling coarse mirror positioning, and an optical path power-sensing feedback loop for controlling fine adjustments in the mirror position.