Abstract: According to an aspect, a bias controller for biasing a power amplifier in an electronic system comprising, a current sensor operative to sense a current flowing through the power amplifier, the current sensor exhibiting an offset error characteristic that is non linear over a first range of power supply voltages and a first set of offsets matching with the offset error characteristic over a second range of power supply voltages that are within the first range of power supply voltages, in that, the first set of offsets are applied for correcting the offset errors of the current sensor when the power amplifier is subjected to the second range of power supply voltages.

Abstract: Systems and circuits implementing an amplifier module are described. An integrated circuit can include a pre-driver stage, a driver stage and a final stage. The pre-driver stage can amplify an input signal to generate a first amplified signal. The driver stage can split the first amplified signal into first and second intermediate signals out-of-phase with each other. The driver stage can absorb reflections from mismatches between the first and second intermediate signals. The driver stage can amplify the first and second intermediate signals to generate first and second amplified intermediate signals, respectively, out-of-phase with each other. The driver stage can absorb reflections from mismatches between the first and second amplified intermediate signals. The driver stage can combine the first and second intermediate amplified signals to generate a second amplified signal. The final stage can amplify the second amplified signal to generate an output amplified signal.

Abstract: According to an aspect, a pre-driver configured to provide power amplification to a radio frequency (RF) signal received on its input terminal, the pre-driver comprising a power transistor amplifying the RF signal, wherein the RF signal is coupled to the base terminal of the power transistor and power of the RF signal is amplified in the form of a collector current of the power transistor, a bias electronics operative to bias the power transistor in a normal bias for the power amplification and a over voltage protection is coupled to the input terminal is configured to limit the collector current by modifying the bias of the power transistor when the RF signal level increases above a threshold value.

Abstract: Apparatuses and systems implementing an amplifier module are described. The amplifier module can include a substrate. A driver amplifier die, a splitter network, an output amplifier die, a bias controller, and a combiner network can be coupled to the substrate. The driver amplifier die can be configured to receive an input radio frequency (RF) signal. The splitter network can be configured to split an intermediate RF signal outputted from the driver amplifier die into first and second RF signals. The output amplifier die can be configured to receive the first and second RF signals. The bias controller can be configured to bias the driver amplifier die and the output amplifier die. The combiner network can be configured to combine first and second outputs of the output amplifier die to generate an output RF signal and terminate at least one harmonic of the output amplifier die's output impedance.

Abstract: Systems and circuits implementing an amplifier module are described. An integrated circuit can include a pre-driver stage, a driver stage and a final stage. The pre-driver stage can amplify an input signal to generate a first amplified signal. The driver stage can amplify the first amplified signal to generate a second amplified signal. The final stage can amplify the second amplified signal to generate an output amplified signal. The final stage can include a peak amplifier, a main amplifier, a peak input matching network, a peak output matching network, a main input matching network and a main output matching network. The peak output network can include a first matching section and a second matching section. The first matching section and the second matching section can perform different impedance matching. The main input matching network can include a harmonic trapping that traps a second harmonic of the second amplified signal.