Abstract: A transceiver includes a radio frequency (RF) input, an RF channelized digital receiver, an RF wideband digital receiver, an analog-to-digital converter (ADC)/digital-to-analog converter (DAC), an RF channelized digital transmitter, and an RF output. The RF channelized digital receiver is configured to split an analog RF input signal into a plurality of sub-octave contiguous frequency band channels and to convert the channels to a plurality of first digital signals. The RF wideband receiver is configured to convert the analog RF input signal into a second digital signal. The ADC/DAC is configured to process each of the first and second digital signals to produce a plurality of third digital signals. The RF channelized digital transmitter is configured to convert each of the third digital signals into a plurality of analog output signals, to combine the analog output signals into an analog RF output signal, and to transmit the analog RF output signal.

Abstract: A system for front end protection of an RF receiver against interfering pulsed high power RF signals includes a dual-diode device comprising a first Transient Voltage Suppressor (TVS) diode; and a second TVS diode; wherein the first TVS diode and the second TVS diode are located between an RF input/output and an RF receiver front end.

Abstract: Flash peripheral device may include a kernel in logical communication with a bootloader where the kernel, when initialized, is adapted to upload in at least one hardware controller via the bootloader. Flash peripheral device may also include at least one firmware protocol in logical communication with the kernel and configured to initialize at least one hardware driver of the at least one hardware controller. Flash peripheral device may also include an operation application in logical communication with the kernel and provided with a legacy set of instructions and at least one updated set of instructions. The operation application executes and runs the at least one updated set of instructions when the at least one updated set of instructions is flashed to the operation application or executes and runs the legacy set of instructions when the at least one updated set of instructions fails to be flashed to the operation application.

Abstract: A system and method are disclosed for a low F-number precision variable-focus telescope that includes a telescope housing containing an optical system. There is a first temperature sensing device to detect a temperature of the telescope housing, a second temperature sensing device to detect an ambient temperature around the telescope housing, and a pressure sensing device to detect ambient pressure around the telescope housing. A controller is in operative communication with the first temperature-sensing device, the second temperature sensing device, and the pressure sensing device. The control regulates the heater to maintain the telescope at a desired temperature to achieve diffraction limited performance in response to signals from the first temperature-sensing device, the second temperature sensing device, and the pressure sensing device.

Abstract: A computer firmware product improves computer processing efficiency by implementing a process to replicate at least one field index in multiple register destinations. A translation table contains data in a plurality of fields and a plurality of register destination addresses for a firmware event. The firmware product pushes data associated with one field to at least two different register destination addresses. The firmware product recompiles the translation table with the updated data pushed from one field to the two different register destination addresses. Then, the firmware product performs a function based on the translation table with the updated data pushed from the one field to the two different register destination addresses by solely changing the translation table.

Abstract: A liquid-cooled printed circuit board chassis, such as a Eurocard chassis, is manufactured without brazing by 3D printing a plurality of components, smoothing and completing the components by subtractive manufacture, and then aligning and assembling the final chassis, all without application of heat. Horizontal cooling channels 3D printed within the chassis components are in thermal contact with board slots, and are divided into subchannels by closely spaced internal walls that function as thermal baffles. The baffles are tilted at oblique angles to increase their cooling efficiency, and to enable AM manufacture without temporary support structures. Elastomer seals between components can connect the cooling channels to vertical connecting channels. EMI seals can be formed between the components by EMI gaskets. The components can be aligned by alignment pins, and joined together by bolts, screws, and/or adhesives.

Abstract: An interposer that enables implementation of a flip-chip die in a wirebonded chip-and-wire circuit assembly includes an insulating substrate having a solder bump pad array on its upper surface that is compatible with the solder bump array of a flip-chip die. Wirebond pads provided along upper edges of the substrate are interconnected to at least some of the solder bump pads. Bonding the interposer to the circuit assembly housing floor, or through an opening to an underlying motherboard, places the wirebond pads proximate attachment points of adjacent wirebond dies, enabling wirebonding therebetween. Attachment pads on the interposer lower surface, in combination with interconnecting traces and vias, can enable connection directly through the housing opening to the underlying motherboard. Support components can be included within an edge cavity created beneath an overhang of a multi-layer substrate. A heat absorbing plate can be attached to the top of the flip-chip die.

Abstract: A chassis configured to hold a cards of at least two form factors comprising: slots disposed in an inner portion the chassis, wherein the slots are aligned with one another and configured to act as card guides; a mid-height structure disposed adjacent a side wall of the chassis, the mid-height structure comprising a second plurality of slots and a third plurality of slots disposed on top and bottom surfaces of the mid-height structure that are substantially parallel to top and bottom walls of the chassis; and a plurality of cooling channels disposed within the walls of the chassis as well as within the mid-height structure, wherein the second and third plurality of slots are configured to align with at least a subset of the plurality of slots disposed in the top and bottom chassis walls and to act as card guides.

Abstract: A hybrid electronic warfare and communications system (EW/COMM) eliminates the space, power, weight, and cost of a dedicated communication system by exchanging messages with other nodes in a network as phase modulations of radar jamming signals. Some embodiments impose message phase modulations onto CW jamming signals, while other embodiments interleave message phase modulations with pseudorandom phase modulations of the jamming signals. Message chip rates can be matched to pseudorandom phase modulation chip rates. Messages are thereby obfuscated as either phase noise or random phase modulation of the jamming signals. Messages can be encoded as BPSK or QPSK modulations. Messages can be preceded by pre-established headers known to other nodes, and distinguished thereby from random noise modulations. Some embodiments include a dedicated COMMS module and/or antenna, while other embodiments implement the communications function mostly or entirely in software.

Abstract: A shock absorbing apparatus that includes a baseplate adapted to be mounted on a platform, a flexure member that operably engages with the baseplate, and a mounting plate that operably engages with the flexure member. The mounting plate is free from direct engagement with the baseplate and is moveable between a neutral position and a translated position with respect to the baseplate. The mounting plate is also adapted to hold a device. The flexure member is adapted to absorb shock forces caused by a ballistic shock event or a projectile motion event in proximity to or applied on the platform.

Abstract: Techniques are provided for non-integer interpolation for signal sampling. A system implementing the techniques according to an embodiment includes a memory configured to store frequency values associated with an input signal sampled at a first clock rate. The system also includes a clock phase detector configured to detect phase alignment between a first clock signal associated with the first clock rate and a second clock signal associated with a second clock rate. The system further includes a read circuit configured to adjust an interpolation time interval in response to the detected phase alignment and to read the frequency values from the memory at the adjusted interpolation time interval. The system further includes a phase accumulator configured to accumulated phase as a sum of the frequency values read from the memory. The system further includes a waveform generator configured to generate an output waveform sample based on the accumulated phase.

Abstract: A Global Positioning System (GPS) digital antenna controller is provided, comprising antenna electronics, a code generator, and an interface. The antenna electronics can be configured to receive a GPS signal. The code generator can be configured to generate a pilot code signal that is synchronized to the DAE local clock reference. The interface can be configured to send the GPS signal and the code signal to a GPS receiver. A system may comprise the GPS digital antenna controller and GPS receiver. The GPS receiver can comprise a second code generator and a processor configured to resolve a timing difference based on the pilot code signal and a second code signal of the second code generator. The controller may be remote from the receiver. The interface may comprise an asynchronous data interface (e.g., Ethernet, USB, Infiniband, or Firewire). To resolve the timing difference may involve GPS code and carrier tracking.

Abstract: A neuromorphic focal plane array ROIC device for temporal and spatial synchronous and asynchronous image event processing comprising a plurality of pixels, each pixel comprising an input section comprising a Sample and Hold (SH) component; a low offset buffer/comparator section comprising a Switched Capacitor Filter (SCF); and a digital event output section comprising an analog pixel bus whereby temporal and spatial image data are synchronously and asynchronously processed.

Abstract: A system and method is provided to characterize optical properties (Scattering, attenuation, de-polarization) of a light-transmitting medium and local environment, by determining a scattering rate of light through a medium, wherein determining the scattering rate of light through the medium is accomplished by utilizing polarized light transmitted from an optical source. The system and method performs a function based on the characterized optical properties of the medium, wherein the function is one of, for example: detection of objects embedded in the medium, object ranging through the medium, or deblurring of images acquired through the medium.

Abstract: The disclosed method enables efficient registration and correction of random vertical and horizontal offsets of a plurality of images of a feature to enable combination thereof with maximum noise suppression. The method includes obtaining image cross correlations and estimating correlation peaks. If a correlation peak cannot be uniquely determined for a given correlation, all candidates are retained. An improved robust weighted regression is applied thereto to obtain estimates of the image shifts. Dimensional symmetry is exploited to remove redundancy from the weighted normal equation, and computational requirements are further reduced by analytically determining the coefficients matrix and the inhomogeneous matrix, thereby circumventing conventional computations. Solution of the resulting consistent, full rank, linear system requires only matrix inversion. For N images, the present method thereby increases computation speed and reduces storage by approximately N2.

Abstract: Techniques are provided for an Identification Friend or Foe (IFF) transponder. A system implementing the techniques according to an embodiment includes an antenna array configured to operate in an omnidirectional mode and a steered directional mode. The system also includes a receiver configured to receive signals provided through the antenna array while operating in the omnidirectional mode and a detector configured to detect an IFF interrogation message in the received signals. The system further includes an angle of arrival (AOA) estimator configured to operate the antenna array in the steered directional mode to estimate an AOA of the IFF interrogation message. The system further includes a transmitter configured to operate the antenna array in the steered directional mode to transmit an IFF response message in the estimated AOA direction. The transmit power of the IFF response message may be based on, for example, the steering gain of the antenna array.

Abstract: Techniques are provided for batch processing signal acquisition. A batch processing signal acquisition system implementing the techniques according to an embodiment includes a recording controller configured to store samples of an input signal to a memory. The input signal is received at a first sampling rate. The system also includes a playback controller configured to read samples from the memory for playback of the input signal at a second sampling rate. The system further includes an acquisition processor configured to detect and locate, in time and frequency, a signal of interest in the playback of the input signal. The system further includes a signal processor configured to process the signal of interest in the playback of the input signal based on the detection and location provided by the acquisition processor.

Abstract: Techniques for jointly estimating geolocations of a plurality of emitting targets. An example method includes acquiring a plurality of bearing measurements, establishing a search grid based on the bearing measurements, performing a joint maximum likelihood optimization procedure on the bearing measurements over the search grid to produce an estimated geolocation solution by solving a nonlinear multi-target geolocation description function for all targets associated with a current rank, repeating the joint maximum likelihood optimization procedure set successive ranks until a maximum rank is reached, evaluating the estimated geolocation solution sets for each rank to determine a number of targets, based on the number of targets, selecting the corresponding geolocation solution set for the rank corresponding to the number of targets, and processing the selected corresponding geolocation solution set to produce a geolocation result that includes an estimated location of each target.

Abstract: A 3D-printed reflective optic providing very high specific stiffness through the utilization of a hollow shelled design, with closed back, filled with high-stiffness internal volumetric space-filling open-cell lattice structures. Structurally-integrated sacrificial structures are included for the purposes of reduction or elimination of tooling during post-processing operations.

Abstract: High power monolithic microwave integrated circuit (MMIC) differential single pole double throw switches utilizing a series of transistors formed by a gallium nitride (GaN) foundry process. The differential switches of the present disclosure allow for larger power handling capability and wideband operation while further providing differential amplitude and phase matching.