Abstract: In a fabric-based infrastructure a flexible scalable server is obtained by physical disaggregation of converged resources to obtain pools of a plurality of operationally independent resource element types such as storage, computing, networking and more. A plurality of computing facilities can be created either dynamically or statically by a resource manager by abstracting instances of resources from such pools of a plurality of resource element types expressed within a single disaggregated logical resource plane.

Abstract: A computer system comprising a processor, a plurality of peripheral resources, and reconfigurable hardware interconnecting the processor and the plurality of peripheral resources. The reconfigurable hardware is arranged to define a control plane interconnecting the processor and the plurality of peripheral resources and a data plane interconnecting the processor and the plurality of peripheral resources, and to carry out bridging between the plurality of peripheral resources through the data plane. The processor is arranged to control the bridging through the control plane.

Abstract: Disclosed are machine-implemented methods and apparatus for memory access and control for an electronic data processing system, comprising allocating, statically or dynamically, ownership of a partition of a global remote memory address space in addition to local memory address space created by at least one local electronic data processing system; presenting local memory access requests for the global remote memory access through a to-remote bridge component identified within a partition of the local address space of the electronic data processing system for translation of the local address into a corresponding translated address in a partition of the global remote memory address space; and receiving a global remote memory access request within the allocated partition by the electronic data processing system through a from-remote bridge for translation of the global remote address into a corresponding translated local address for direct and consistent access to the corresponding local memory address.