Patents Assigned to Bandgap Engineering Inc.
-
Publication number: 20160268452Abstract: A process is provided for contacting a nanostructured surface. In that process, a substrate is provided having a nanostructured material on a surface, the substrate being conductive and the nanostructured material being coated with an insulating material. A portion of the nanostructured material is at least partially removed. A conductor is deposited on the substrate in such a way that it is in electrical contact with the substrate through the area where the nanostructured material has been at least partially removed.Type: ApplicationFiled: August 25, 2014Publication date: September 15, 2016Applicant: Bandgap Engineering, Inc.Inventors: Marcie R. Black, Joanne Forziati, Michael Jura, Jeff Miller, Brian Murphy, Adam Standley
-
Publication number: 20150136212Abstract: A process is provided for contacting a nanostructured surface. In that process, a substrate is provided having a nanostructured material on a surface, the substrate being conductive and the nanostructured material being coated with an insulating material. A portion of the nanostructured material is at least partially removed. A conductor is deposited on the substrate in such a way that it is in electrical contact with the substrate through the area where the nanostructured material has been at least partially removed.Type: ApplicationFiled: August 25, 2014Publication date: May 21, 2015Applicant: Bandgap Engineering, Inc.Inventors: Marcie R. Black, Joanne Forziati, Michael Jura, Jeff Miller, Brian Murphy, Adam Standley
-
Publication number: 20150017802Abstract: In an aspect of this disclosure, a method is provided comprising the steps of: (a) providing a silicon-containing substrate, (b) depositing a first metal on the substrate, (c) etching the substrate produced by step (b) using a first etch, and (d) etching the substrate produced by step (c) using a second etch, wherein the second etch is more aggressive towards the deposited metal than the first etch, wherein the result of step (d) comprises silicon nanowires. The method may further comprise, for example, steps (b1) subjecting the first metal to a treatment which causes it to agglomerate and (b2) depositing a second metal.Type: ApplicationFiled: July 13, 2014Publication date: January 15, 2015Applicant: Bandgap Engineering, Inc.Inventors: Joanne Yim, Jeff Miller, Michael Jura, Marcie R. Black, Joanne Forziati, Brian Murphy, Adam Standley
-
Patent number: 8852981Abstract: A process is provided for contacting a nanostructured surface. In that process, a substrate is provided having a nanostructured material on a surface, the substrate being conductive and the nanostructured material being coated with an insulating material. A portion of the nanostructured material is at least partially removed. A conductor is deposited on the substrate in such a way that it is in electrical contact with the substrate through the area where the nanostructured material has been at least partially removed.Type: GrantFiled: September 19, 2012Date of Patent: October 7, 2014Assignee: Bandgap Engineering, Inc.Inventors: Marcie R. Black, Joanne Forziati, Michael Jura, Jeff Miller, Brian Murphy, Adam Standley
-
Patent number: 8829485Abstract: Another aspect of the present disclosure relates to a device including a substrate, having a top surface and a bottom surface; an array of nanowires having a base and a top surface, the base contacting the top surface of the substrate; a contacting structure including the same material as the substrate having a non-nanostructured surface of a dimension suitable for forming an electrical contact, located on the same side of the substrate as the array of silicon nanowires; wherein the contacting structure is doped with a greater impurity concentration than the nanowire array, thereby forming a selective emitter.Type: GrantFiled: January 18, 2012Date of Patent: September 9, 2014Assignee: Bandgap Engineering, Inc.Inventors: Faris Modawar, Marcie R. Black, Brian Murphy, Jeff Miller, Mike Jura
-
Patent number: 8791449Abstract: A process is provided for etching a silicon-containing substrate to form nanowire arrays. In this process, one deposits nanoparticles and a metal film onto the substrate in such a way that the metal is present and touches silicon where etching is desired and is blocked from touching silicon or not present elsewhere. One submerges the metallized substrate into an etchant aqueous solution comprising HF and an oxidizing agent. In this way arrays of nanowires with controlled diameter and length are produced.Type: GrantFiled: November 28, 2011Date of Patent: July 29, 2014Assignee: Bandgap Engineering, Inc.Inventors: Brent A. Buchine, Faris Modawar, Marcie R. Black
-
Patent number: 8734659Abstract: A process for etching a silicon-containing substrate to form structures is provided. In the process, a metal is deposited and patterned onto a silicon-containing substrate (commonly one with a resistivity above 1-10 ohm-cm) in such a way that the metal is present and touches silicon where etching is desired and is blocked from touching silicon or not present elsewhere. The metallized substrate is submerged into an etchant aqueous solution comprising about 4 to about 49 weight percent HF and an oxidizing agent such as about 0.5 to about 30 weight percent H2O2, thus producing a metallized substrate with one or more trenches. A second silicon etch is optionally employed to remove nanowires inside the one or more trenches.Type: GrantFiled: October 9, 2009Date of Patent: May 27, 2014Assignee: Bandgap Engineering Inc.Inventors: Brent A. Buchine, Faris Modawar, Marcie R. Black
-
Publication number: 20130247966Abstract: A photovoltaic device is provided. It comprises at least two electrical contacts, p type dopants and n type dopants. It also comprises a bulk region and nanowires in an aligned array which contact the bulk region. All nanowires in the array have one predominant type of dopant, n or p, and at least a portion of the bulk region also comprises that predominant type of dopant. The portion of the bulk region comprising the predominant type of dopant typically contacts the nanowire array. The photovoltaic devices' p-n junction would then be found in the bulk region. The photovoltaic devices would commonly comprise silicon.Type: ApplicationFiled: May 24, 2013Publication date: September 26, 2013Applicant: Bandgap Engineering, Inc.Inventors: Brent A. Buchine, Faris Modawar, Marcie R. Black
-
Patent number: 8450599Abstract: A photovoltaic device is provided. It comprises at least two electrical contacts, p type dopants and n type dopants. It also comprises a bulk region and nanowires in an aligned array which contact the bulk region. All nanowires in the array have one predominant type of dopant, n or p, and at least a portion of the bulk region also comprises that predominant type of dopant. The portion of the bulk region comprising the predominant type of dopant typically contacts the nanowire array. The photovoltaic devices' p-n junction would then be found in the bulk region. The photovoltaic devices would commonly comprise silicon.Type: GrantFiled: November 16, 2009Date of Patent: May 28, 2013Assignee: Bandgap Engineering, Inc.Inventors: Brent A. Buchine, Faris Modawar, Marcie R. Black
-
Patent number: 8416485Abstract: A nanostructured optoelectronic device is provided which comprises a nanostructured material and a host material intermingled with the nanostructured material. The host material may have a higher index of refraction than the nanostructured material. The host material's index of refraction may be chosen to maximize the effective active area of the device. In an alternative embodiment, the host material comprises scattering centers or absorption/luminescence centers which absorb light and reemit the light at a different energy or both.Type: GrantFiled: June 6, 2011Date of Patent: April 9, 2013Assignee: Bandgap Engineering, Inc.Inventors: Marcie R. Black, Brent A. Buchine
-
Publication number: 20120181502Abstract: In one aspect, the present disclosure relates to a device including a substrate, having a top surface and a bottom surface; an array of nanowires having a base and a top surface, the base contacting the top surface of the substrate; a contacting structure having a non-nanostructured surface, having a top surface and a bottom surface, located on the same side of the substrate as the array of silicon nanowires; and an electrical contact in contact with the top surface of the contacting structure. In some embodiments, the device includes an aluminum oxide passivation layer over the array of nanowires. In some embodiments, the layer of aluminum oxide is deposited via atomic layer deposition.Type: ApplicationFiled: January 18, 2012Publication date: July 19, 2012Applicant: Bandgap Engineering, Inc.Inventors: Faris Modawar, Marcie R. Black, Brian Murphy, Jeff Miller, Mike Jura
-
Publication number: 20120153251Abstract: Another aspect of the present disclosure relates to a device including a substrate, having a top surface and a bottom surface; an array of nanowires having a base and a top surface, the base contacting the top surface of the substrate; a contacting structure including the same material as the substrate having a non-nanostructured surface of a dimension suitable for forming an electrical contact, located on the same side of the substrate as the array of silicon nanowires; wherein the contacting structure is doped with a greater impurity concentration than the nanowire array, thereby forming a selective emitter.Type: ApplicationFiled: January 18, 2012Publication date: June 21, 2012Applicant: Bandgap Engineering, Inc.Inventors: Faris Modawar, Marcie R. Black, Brian Murphy, Jeff Miller, Mike Jura
-
Publication number: 20120153250Abstract: In one aspect, the present disclosure relates to a device including a silicon substrate, wherein at least a portion of the substrate surface can be a silicon nanowire array; and a layer of alumina covering the silicon nanowire array. In some embodiments, the device can be a solar cell. In some embodiments, the device can be a p-n junction. In some embodiments, the p-n junction can be located below the bottom surface the nanowire array.Type: ApplicationFiled: January 18, 2012Publication date: June 21, 2012Applicant: Bandgap Engineering, Inc.Inventors: Faris Modawar, Marcie R. Black, Brian Murphy, Jeff Miller, Mike Jura
-
Patent number: 7973995Abstract: A nanostructured optoelectronic device is provided which comprises a nanostructured material and a host material intermingled with the nanostructured material. The host material may have a higher index of refraction than the nanostructured material. The host material's index of refraction may be chosen to maximize the effective active area of the device. In an alternative embodiment, the host material comprises scattering centers or absorption/luminescence centers which absorb light and reemit the light at a different energy or both.Type: GrantFiled: April 3, 2009Date of Patent: July 5, 2011Assignee: Bandgap Engineering Inc.Inventors: Marcie R. Black, Brent A. Buchine