Patents Assigned to Bay Microsystems
  • Patent number: 8010751
    Abstract: A distributed multi-processor out-of-order system includes multiple processors, an arbiter, a data dispatcher, a memory controller, a storage unit, multiple memory access requests issued by the multiple processors, and multiple data units that provide the results of the multiple memory access requests. Each of the multiple memory access requests includes a tag that identifies the priority of the processor that issued the memory access request, a processor identification number that identifies the processor that issued the request, and a processor access sequence number that identifies the order that the particular one of the processors issued the request. Each of the data units also includes a tag that specifies the processor identification number, the processor access sequence number, and a data sequence number that identifies the order of the data units satisfying the corresponding one of the memory requests.
    Type: Grant
    Filed: April 14, 2003
    Date of Patent: August 30, 2011
    Assignee: Bay Microsystems
    Inventors: Eric Kuo-Uei Yang, Jun-Wen Tsong