Patents Assigned to Bay Networks, Inc.
  • Patent number: 5574910
    Abstract: A packet processing method and apparatus efficiently process a binary data packet based upon information contained in the header portion of the packet. The method and apparatus employ a binary tree search method for determining ranges of key elements of the packet and associating with each of the ranges a user supplied data and filter mask. The binary search process employs a unique binary tree storage structure which both conserves storage memory and enables efficient processing to reach a final node of the binary tree decision table. Nodes can be added or deleted from the table by the user as the data packet processing needs change.
    Type: Grant
    Filed: October 30, 1995
    Date of Patent: November 12, 1996
    Assignee: Bay Networks, Inc.
    Inventors: Jan Bialkowski, John Krawczyk
  • Patent number: 5561771
    Abstract: A method and apparatus for transmitting data between nodes connected to a communications bus, preferably a computer backbone, divides a full bus width into a plurality of sub-buses. Each sub-bus can be independently operated, and each node on the network can connect to one or more of the sub-buses. The apparatus provides, at a transmitting node, a determination of which sub-buses are available to transmit a data packet to one or more receiving nodes. The data words are divided into sub-words, thereby reducing the memory access time requirements and saving memory costs. In accordance with a particular embodiment, the header, at the beginning of the data packet, and the error check control, provided at the end of the data packet, are sent at a slower speed than the data information portion of the packet. The data information portion of the packet is sent at the highest speed compatible with the receiving node or nodes. In case one sub-bus fails, a node can transmit data over the other sub-buses available to it.
    Type: Grant
    Filed: August 11, 1995
    Date of Patent: October 1, 1996
    Assignee: Bay Networks, Inc.
    Inventors: Edward S. Harriman, Jr, Heather D. M. Achilles
  • Patent number: 5541920
    Abstract: A delayed replace mechanism for a streaming packet modification engine. The delayed replace mechanism allows for packet streaming where embedded fields within a data packet may be modified dependent upon fields following them within the data packet. Data to be forwarded is buffered through a data FIFO while marking fields that are to be replaced. Calculated replacement fields are stored in a replacement FIFO to be overwritten upon transmission from the packet streaming mechanism.
    Type: Grant
    Filed: June 15, 1995
    Date of Patent: July 30, 1996
    Assignee: Bay Networks, Inc.
    Inventors: Richard Angle, Geoffrey Ladwig
  • Patent number: 5537099
    Abstract: A method and apparatus for preventing intrusive access to a network. The method and apparatus are implemented in a network having a star topology. Utilizing a network management module of a network concentrator as a centralized functional base, unauthorized Data Terminal Elements (DTEs) may be prevented from transmitting messages on a network. By providing a centrally located means by which a set of unique DTE addresses can be associated with a particular port on the network concentrator, valid DTE addresses can be associated with a message packet that contains the address of the transmitting DTE. If the DTE address matches those associated with the port from which it was received, the message packet is authorized. If the DTE address does not match those addresses associated with from which it was received, the message packet is unauthorized. When an unauthorized message packet is received, the port from which the frame was received, is partitioned.
    Type: Grant
    Filed: May 18, 1994
    Date of Patent: July 16, 1996
    Assignee: Bay Networks, Inc.
    Inventor: Chao-Yu Liang
  • Patent number: 5398245
    Abstract: A method and apparatus for processing a data packet, for delivery to a designated location, store selective portions of the packet header in a high speed cache memory to increase processing speed and hence throughput for a packet delivery system. The apparatus and method receive the packets from a data channel source and store portions of the header in cache, and at least the remainder of each data packet is stored in a slower speed memory. A CPU accesses the stored header portion of each packet in cache for necessary protocol and destination information processing of the data packet. The header portions are then overwritten with new data and combined with the remainder of the data packet stored in slower speed memory for transmission to the next packet destination. Preferably, the address at which the remainder portions are stored in slower speed memory determine the cache addresses at which the header portion is stored in high speed cache memory.
    Type: Grant
    Filed: October 4, 1991
    Date of Patent: March 14, 1995
    Assignee: Bay Networks, Inc.
    Inventor: Edward S. Harriman, Jr.