Abstract: Multiprocessor cratecontroller, containing control microprocessor with storage, each of them bi-directionally connected with the bus of the microprocessor. A data channel control processor is connected with a program storage, a multiplexer, an address register of the program storage, an interruptions handling processor, a data address register, a data register and the bus of the microprocessor. The program storage is connected with the bus of the microprocessor, with the register of stations, with the multiplexer, and with the data address register; the multiplexer is connected with the bus of the microprocessor and the address register of the program storage, which is connected also with the bus of the microprocessor. The register of stations is connected with a CAMAC bus as well as the interruptions handling processor. The data address register and the data register are connected with the bus of the microprocessor and the CAMAC bus as well.