Patents Assigned to BEIJING BOE OPOELECTRONICS TECHNOLOGY CO., LTD.
  • Publication number: 20170147123
    Abstract: The present disclosure provides a touch display panel including a self-capacitance or mutual-capacitance type touch display panel, a manufacturing method and a method driving for the same and a display device. The self-capacitance type touch display panel includes an array substrate having a first metal layer and self-capacitance touch electrodes, and a touch control chip. Each touch electrode includes common electrodes, first metal layer includes touch lead wires corresponding to the touch electrodes, and each touch electrode is connected with the touch control chip via a corresponding touch lead wire. The touch lead wire is configured to transmit a common electrode signal to the touch electrode during a display stage, to transmit a touch scan signal to the touch electrode during a touch stage, and to transmit a touch signal, which is generated by the touch electrode at a position where a touch operation occurs, to the touch control chip.
    Type: Application
    Filed: October 14, 2015
    Publication date: May 25, 2017
    Applicants: BOE Technology Group Co., Ltd., Beijing BOE Opoelectronics Technology Co., Ltd.
    Inventors: Lei Wang, Xiaochuan Chen, Haisheng Wang, Shengji Yang, Rui XU, Qian Wang, Changfeng Li, Ming Yang, Pengcheng Lu, Xiaoliang Ding, Wei Liu, Hongjuan Liu, Yingming Liu, Weijie Zhao, Zhenhua Lv, Shijun Wang
  • Publication number: 20160013210
    Abstract: A method for manufacturing an array substrate which includes: depositing a gate metal film on a base substrate, and forming a first pattern including the gate electrode by a first patterning process; depositing a gate insulating film, a first transparent conductive film, a source/drain metal film and a doped a-Si film sequentially, and forming a second pattern including the pixel electrode, the source electrode, the drain electrode and a doped semiconductor layer by a second patterning process; depositing an a-Si film, and forming a third pattern including a TFT channel, the semiconductor layer and a gate insulating layer via-hole by a third patterning process; depositing a passivation layer film, and forming a fourth pattern including a passivation layer via-hole by a fourth patterning process, the passivation layer via-hole being arranged at a position corresponding to the gate insulating layer via-hole; and depositing a second transparent conductive film on the base substrate with the fourth pattern, and f
    Type: Application
    Filed: July 9, 2014
    Publication date: January 14, 2016
    Applicants: BOE TECHNOLOGY GROUP CO., LTD, BEIJING BOE OPOELECTRONICS TECHNOLOGY CO., LTD
    Inventors: Tiansheng Li, Zhenyu Xie
  • Publication number: 20150064927
    Abstract: A surface planarization method of thin film and a preparing method of an array substrate relate to a display field, and can solve the technical problem that the conventional dry etching severely damages the surface flatness of other film layers below the one being etched, thereby improving the display properties of the LCD. The preparing method of the array substrate comprises patterning a non-metallic layer (4) by a dry etching. And following the step of patterning a non-metallic layer (4) by the dry etching, the method further comprises performing surface planarization on a first film layer (3) to recover the first film layer (3) with a rough surface caused by the dry etching to be planar. The first film layer (3) is located below the non-metallic layer (4).
    Type: Application
    Filed: June 5, 2013
    Publication date: March 5, 2015
    Applicants: BEIJING BOE OPOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Lei Chen, Ziqi Xia, Wukun Dai, Jiapeng Li, Xiuhong Jin, Fengguo Wang, Lei Zhang, Miao Qiu