Abstract: Systems in which PCM is used, including memory systems, as well as methods for operating such systems. A comparison of PCM memory elements storing logical values to a trigger resistance or to each other can be used to determine the extent of resistance drift since the PCM memory elements were last written. If the comparison determines that the resistance drift has passed a sense margin threshold or a trigger resistance, a memory refresh is triggered and pre-drift resistances corresponding to the stored logical values are written to the PCM memory elements.

Abstract: Systems in which PCM is used, including memory systems, as well as methods for operating such systems. A test of PCM memory elements with known states can be used to determine whether immediately available voltage levels can reliably read PCM. This can be used to accelerate availability of memory states residing in PCM with respect to, for example, redundancy address storage, other startup state information, and parameters for which nonvolatile storage is useful.

Abstract: Systems in which multi-bit PCM is used, including memory systems, as well as methods for operating such systems. A test of multi-bit PCM memory elements with known states can be used to determine whether immediately available voltage levels can reliably read multi-bit PCM. This can be used to accelerate availability of memory states residing in multi-bit PCM with respect to, for example, redundancy address storage, other startup state information, and parameters for which nonvolatile storage is useful.

Abstract: The present application discloses phase-change memory architectures and methods, in which an additional test is performed, after the normal power-valid signal, to assure that the phase-change memory components which are used for storing configuration data are able to operate correctly. Surprisingly, the inventor has discovered that this additional test is highly desirable when using phase-change memory for configuration data.

Abstract: Methods and systems for phase change memory having high RESET currents. In some sample embodiments, PCM elements share access devices in parallel between bit lines, permitting higher RESET currents to be shared between several access devices without overdriving. Lower individual current densities permit smaller access devices and smaller memories having greater reliability and longer retention. In some sample embodiments, hybrid arrays connect bit lines on only a few word lines, using the shared bits e.g. only for critical information. In some sample embodiments, several PCM elements share a single larger access device which can pass higher currents while still reducing the total memory size.