Patents Assigned to Bell Semiconductor, LLC
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Patent number: 12278234Abstract: A multi-fin FINFET device may include a substrate and a plurality of semiconductor fins extending upwardly from the substrate and being spaced apart along the substrate. Each semiconductor fin may have opposing first and second ends and a medial portion therebetween, and outermost fins of the plurality of semiconductor fins may comprise an epitaxial growth barrier on outside surfaces thereof. The FIN FET may further include at least one gate overlying the medial portions of the semiconductor fins, a plurality of raised epitaxial semiconductor source regions between the semiconductor fins adjacent the first ends thereof, and a plurality of raised epitaxial semiconductor drain regions between the semiconductor fins adjacent the second ends thereof.Type: GrantFiled: February 21, 2023Date of Patent: April 15, 2025Assignee: Bell Semiconductor, LLCInventors: Qing Liu, Prasanna Khare, Nicolas Loubet
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Patent number: 12191309Abstract: Methods and structures for forming strained-channel finFETs are described. Fin structures for finFETs may be formed using two epitaxial layers of different lattice constants that are grown over a bulk substrate. A first thin, strained, epitaxial layer may be cut to form strain-relieved base structures for fins. The base structures may be constrained in a strained-relieved state. Fin structures may be epitaxially grown in a second layer over the base structures. The constrained base structures can cause higher amounts of strain to form in the epitaxially-grown fins than would occur for non-constrained base structures.Type: GrantFiled: February 28, 2024Date of Patent: January 7, 2025Assignee: Bell Semiconductor, LLCInventors: Pierre Morin, Nicolas Loubet
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Publication number: 20240203995Abstract: Methods and structures for forming strained-channel finFETs are described. Fin structures for finFETs may be formed using two epitaxial layers of different lattice constants that are grown over a bulk substrate. A first thin, strained, epitaxial layer may be cut to form strain-relieved base structures for fins. The base structures may be constrained in a strained-relieved state. Fin structures may be epitaxially grown in a second layer over the base structures. The constrained base structures can cause higher amounts of strain to form in the epitaxially-grown fins than would occur for non-constrained base structures.Type: ApplicationFiled: February 28, 2024Publication date: June 20, 2024Applicant: Bell Semiconductor, LLCInventors: Pierre MORIN, Nicolas LOUBET
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Patent number: 11948943Abstract: Methods and structures for forming strained-channel finFETs are described. Fin structures for finFETs may be formed using two epitaxial layers of different lattice constants that are grown over a bulk substrate. A first thin, strained, epitaxial layer may be cut to form strain-relieved base structures for fins. The base structures may be constrained in a strained-relieved state. Fin structures may be epitaxially grown in a second layer over the base structures. The constrained base structures can cause higher amounts of strain to form in the epitaxially-grown fins than would occur for non-constrained base structures.Type: GrantFiled: January 20, 2023Date of Patent: April 2, 2024Assignee: Bell Semiconductor, LLCInventors: Pierre Morin, Nicolas Loubet
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Publication number: 20230260846Abstract: A method for co-integrating finFETs of two semiconductor material types, e.g., Si and SiGe, on a bulk substrate is described. Fins for finFETs may be formed in an epitaxial layer of a first semiconductor type, and covered with an insulator. A portion of the fins may be removed to form voids in the insulator, and the voids may be filled by epitaxially growing a semiconductor material of a second type in the voids. The co-integrated finFETs may be formed at a same device level.Type: ApplicationFiled: April 25, 2023Publication date: August 17, 2023Applicant: Bell Semiconductor, LLCInventors: Nicolas Loubet, Prasanna Khare, Qing Liu
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Publication number: 20230197720Abstract: A multi-fin FINFET device may include a substrate and a plurality of semiconductor fins extending upwardly from the substrate and being spaced apart along the substrate. Each semiconductor fin may have opposing first and second ends and a medial portion therebetween, and outermost fins of the plurality of semiconductor fins may comprise an epitaxial growth barrier on outside surfaces thereof. The FIN FET may further include at least one gate overlying the medial portions of the semiconductor fins, a plurality of raised epitaxial semiconductor source regions between the semiconductor fins adjacent the first ends thereof, and a plurality of raised epitaxial semiconductor drain regions between the semiconductor fins adjacent the second ends thereof.Type: ApplicationFiled: February 21, 2023Publication date: June 22, 2023Applicant: Bell Semiconductor, LLCInventors: Qing LIU, Prasanna KHARE, Nicolas LOUBET
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Patent number: 11670554Abstract: A method for co-integrating finFETs of two semiconductor material types, e.g., Si and SiGe, on a bulk substrate is described. Fins for finFETs may be formed in an epitaxial layer of a first semiconductor type, and covered with an insulator. A portion of the fins may be removed to form voids in the insulator, and the voids may be filled by epitaxially growing a semiconductor material of a second type in the voids. The co-integrated finFETs may be formed at a same device level.Type: GrantFiled: May 30, 2019Date of Patent: June 6, 2023Assignee: Bell Semiconductor, LLCInventors: Nicolas Loubet, Prasanna Khare, Qing Liu
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Publication number: 20230121119Abstract: A method of making a semiconductor device includes forming a fin mask layer on a semiconductor layer, forming a dummy gate over the fin mask layer, and forming source and drain regions on opposite sides of the dummy gate. The dummy gate is removed and the underlying fin mask layer is used to define a plurality of fins in the semiconductor layer. A gate is formed over the plurality of fins.Type: ApplicationFiled: December 20, 2022Publication date: April 20, 2023Applicant: Bell Semiconductor, LLCInventors: Nicolas LOUBET, Prasanna KHARE
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Patent number: 11610886Abstract: A multi-fin FINFET device may include a substrate and a plurality of semiconductor fins extending upwardly from the substrate and being spaced apart along the substrate. Each semiconductor fin may have opposing first and second ends and a medial portion therebetween, and outermost fins of the plurality of semiconductor fins may comprise an epitaxial growth barrier on outside surfaces thereof. The FINFET may further include at least one gate overlying the medial portions of the semiconductor fins, a plurality of raised epitaxial semiconductor source regions between the semiconductor fins adjacent the first ends thereof, and a plurality of raised epitaxial semiconductor drain regions between the semiconductor fins adjacent the second ends thereof.Type: GrantFiled: July 1, 2021Date of Patent: March 21, 2023Assignee: Bell Semiconductor, LLCInventors: Qing Liu, Prasanna Khare, Nicolas Loubet
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Patent number: 11587928Abstract: Methods and structures for forming strained-channel finFETs are described. Fin structures for finFETs may be formed using two epitaxial layers of different lattice constants that are grown over a bulk substrate. A first thin, strained, epitaxial layer may be cut to form strain-relieved base structures for fins. The base structures may be constrained in a strained-relieved state. Fin structures may be epitaxially grown in a second layer over the base structures. The constrained base structures can cause higher amounts of strain to form in the epitaxially-grown fins than would occur for non-constrained base structures.Type: GrantFiled: November 9, 2020Date of Patent: February 21, 2023Assignee: Bell Semiconductor, LLCInventors: Pierre Morin, Nicolas Loubet