Abstract: Described herein are embodiments of a switching network for integrating electrophysiology components into an electrophysiology system. These electrophysiology components may include electrophysiology recorder, three-dimensional mapping systems, radio frequency generators, and stimulators. The switching network provides switchable connections, which allow the electrophysiology system to be reconfigured to perform different electrophysiology procedures, such as heart signal recording and mapping, cardiac ablation, or cardiac pacing. A recorder may provide control signals to the switching network to change connections between electrophysiology equipment and a catheter in a patient's heart. The electrophysiology system may control generation of biphasic pulses for use in cardiac pacing. The electrophysiology system may reconfigure the effective size the tip electrode of a split tip catheter.

Abstract: Systems, methods, and computer program product embodiments are disclosed for displaying cardiac signals based on a signal pattern. An embodiment operates by accessing an input cardiac signal. The embodiment matches a portion of the input cardiac signal to a known signal pattern. The embodiment then displays an indication of a degree of the match.

Abstract: Systems, methods, and computer program product embodiments are disclosed for removing any fixed frequency interfering signal from an input signal without introducing artifacts that are not part of the original signal of interest. An embodiment operates by using a virtual buffer with a length that matches a length of one cycle of an interfering signal. The embodiment extracts the interfering signal into the virtual buffer. For a sample in the next cycle of the interfering signal that corresponds to a virtual memory location for the virtual buffer, the embodiment can update one or more physical memory locations of the virtual buffer that are in the vicinity of the virtual memory location. This use of virtual buffer can remove any interfering signal without creating the artifacts associated with conventional notch filters.

Abstract: Systems, methods, and computer program product embodiments are disclosed for performing electrophysiology (EP) signal processing. An embodiment includes an electrocardiogram (ECG) circuit board configured to process an ECG signal. The embodiment further includes a plurality of intracardiac (IC) circuit boards, each configured to process a corresponding IC signal. The ECG circuit board and the plurality of IC circuit boards share substantially a same circuit configuration and components. The ECG circuit board further processes the ECG signal using substantially a same path as each IC circuit board uses to process its corresponding IC signal.

Abstract: Methods, systems, and media are disclosed for reconstructing bioelectronic lead placement. In some embodiments, the disclosed system can include a processor configured to determine relationships between EP signals of one or more pairs of a plurality of electrodes over one or more sampling time periods, wherein the plurality electrodes are separately placed on a patient's body for collecting the EP signals, and to reconstruct geometry of the plurality of electrodes based on the relationships between the EP signals.

Abstract: Apparatus and methods remove a voltage offset from an electrical signal, specifically a biomedical signal. A signal is received at a first operational amplifier and is amplified by a gain. An amplitude of the signal is monitored, by a first pair of diode stages coupled to an output of the first operational amplifier, for the voltage offset. The amplitude of the signal is then attenuated by the first pair of diode stages and a plurality of timing banks. The attenuating includes limiting charging, by the first pair of diode stages, of the plurality of timing banks and setting a time constant based on the charging. The attenuating removes the voltage offset persisting at a threshold for a duration of at least the time constant. Saturation of the signal is limited to a saturation recovery time while the saturated signal is gradually pulled into monitoring range over the saturation recovery time.

Abstract: Systems, methods, and computer program product embodiments are disclosed for removing any fixed frequency interfering signal from an input signal without introducing artifacts that are not part of the original signal of interest. An embodiment operates by using a virtual buffer with a length that matches a length of one cycle of an interfering signal. The embodiment extracts the interfering signal into the virtual buffer. For a sample in the next cycle of the interfering signal that corresponds to a virtual memory location for the virtual buffer, the embodiment can update one or more physical memory locations of the virtual buffer that are in the vicinity of the virtual memory location. This use of virtual buffer can remove any interfering signal without creating the artifacts associated with conventional notch filters.

Abstract: Apparatus and methods remove a voltage offset from an electrical signal, specifically a biomedical signal. A signal is received at a first operational amplifier and is amplified by a gain. An amplitude of the signal is monitored, by a first pair of diode stages coupled to an output of the first operational amplifier, for the voltage offset. The amplitude of the signal is then attenuated by the first pair of diode stages and a plurality of timing banks. The attenuating includes limiting charging, by the first pair of diode stages, of the plurality of timing banks and setting a time constant based on the charging. The attenuating removes the voltage offset persisting at a threshold for a duration of at least the time constant. Saturation of the signal is limited to a saturation recovery time while the saturated signal is gradually pulled into monitoring range over the saturation recovery time.

Abstract: Apparatus and methods remove a voltage offset from an electrical signal, specifically a biomedical signal. A signal is received at a first operational amplifier and is amplified by a gain. An amplitude of the signal is monitored, by a first pair of diode stages coupled to an output of the first operational amplifier, for the voltage offset. The amplitude of the signal is then attenuated by the first pair of diode stages and a plurality of timing banks. The attenuating includes limiting charging, by the first pair of diode stages, of the plurality of timing banks and setting a time constant based on the charging. The attenuating removes the voltage offset persisting at a threshold for a duration of at least the time constant. Saturation of the signal is limited to a saturation recovery time while the saturated signal is gradually pulled into monitoring range over the saturation recovery time.

Abstract: Systems, methods, and computer program product embodiments are disclosed for removing any fixed frequency interfering signal from an input signal without introducing artifacts that are not part of the original signal of interest. An embodiment operates by using a virtual buffer with a length that matches a length of one cycle of an interfering signal. The embodiment extracts the interfering signal into the virtual buffer. For a sample in the next cycle of the interfering signal that corresponds to a virtual memory location for the virtual buffer, the embodiment can update one or more physical memory locations of the virtual buffer that are in the vicinity of the virtual memory location. This use of virtual buffer can remove any interfering signal without creating the artifacts associated with conventional notch filters.

Abstract: Systems, methods, and computer program product embodiments are disclosed for removing any fixed frequency interfering signal from an input signal without introducing artifacts that are not part of the original signal of interest. An embodiment operates by using a virtual buffer with a length that matches a length of one cycle of an interfering signal. The embodiment extracts the interfering signal into the virtual buffer. For a sample in the next cycle of the interfering signal that corresponds to a virtual memory location for the virtual buffer, the embodiment can update one or more physical memory locations of the virtual buffer that are in the vicinity of the virtual memory location. This use of virtual buffer can remove any interfering signal without creating the artifacts associated with conventional notch filters.

Abstract: Systems, methods, and computer program product embodiments are disclosed for performing electrophysiology (EP) signal processing. An embodiment includes an electrocardiogram (ECG) circuit board configured to process an ECG signal. The embodiment further includes a plurality of intracardiac (IC) circuit boards, each configured to process a corresponding IC signal. The ECG circuit board and the plurality of IC circuit boards share substantially a same circuit configuration and components. The ECG circuit board further processes the ECG signal using substantially a same path as each IC circuit board uses to process its corresponding IC signal.

Abstract: Apparatus and methods remove a voltage offset from an electrical signal, specifically a biomedical signal. A signal is received at a first operational amplifier and is amplified by a gain. An amplitude of the signal is monitored, by a first pair of diode stages coupled to an output of the first operational amplifier, for the voltage offset. The amplitude of the signal is then attenuated by the first pair of diode stages and a plurality of timing banks. The attenuating includes limiting charging, by the first pair of diode stages, of the plurality of timing banks and setting a time constant based on the charging. The attenuating removes the voltage offset persisting at a threshold for a duration of at least the time constant. Saturation of the signal is limited to a saturation recovery time while the saturated signal is gradually pulled into monitoring range over the saturation recovery time.

Abstract: Systems, methods, and computer program product embodiments are disclosed for performing electrophysiology (EP) signal processing. An embodiment includes an electrocardiogram (ECG) circuit board configured to process an ECG signal. The embodiment further includes a plurality of intracardiac (IC) circuit boards, each configured to process a corresponding IC signal. The ECG circuit board and the plurality of IC circuit boards share substantially a same circuit configuration and components. The ECG circuit board further processes the ECG signal using substantially a same path as each IC circuit board uses to process its corresponding IC signal.

Abstract: Apparatus and methods remove a voltage offset from an electrical signal, specifically a biomedical signal. A signal is received at a first operational amplifier and is amplified by a gain. An amplitude of the signal is monitored, by a first pair of diode stages coupled to an output of the first operational amplifier, for the voltage offset. The amplitude of the signal is then attenuated by the first pair of diode stages and a plurality of timing banks. The attenuating includes limiting charging, by the first pair of diode stages, of the plurality of timing banks and setting a time constant based on the charging. The attenuating removes the voltage offset persisting at a threshold for a duration of at least the time constant. Saturation of the signal is limited to a saturation recovery time while the saturated signal is gradually pulled into monitoring range over the saturation recovery time.

Abstract: Systems, methods, and computer program product embodiments are disclosed for removing any fixed frequency interfering signal from an input signal without introducing artifacts that are not part of the original signal of interest. An embodiment operates by using a virtual buffer with a length that matches a length of one cycle of an interfering signal. The embodiment extracts the interfering signal into the virtual buffer. For a sample in the next cycle of the interfering signal that corresponds to a virtual memory location for the virtual buffer, the embodiment can update one or more physical memory locations of the virtual buffer that are in the vicinity of the virtual memory location. This use of virtual buffer can remove any interfering signal without creating the artifacts associated with conventional notch filters.

Abstract: Apparatus and methods remove a voltage offset from an electrical signal, specifically a biomedical signal. A signal is received at a first operational amplifier and is amplified by a gain. An amplitude of the signal is monitored, by a first pair of diode stages coupled to an output of the first operational amplifier, for the voltage offset. The amplitude of the signal is then attenuated by the first pair of diode stages and a plurality of timing banks. The attenuating includes limiting charging, by the first pair of diode stages, of the plurality of timing banks and setting a time constant based on the charging. The attenuating removes the voltage offset persisting at a threshold for a duration of at least the time constant. Saturation of the signal is limited to a saturation recovery time while the saturated signal is gradually pulled into monitoring range over the saturation recovery time.

Abstract: Methods, systems, and media are disclosed for reconstructing bioelectronic lead placement. In some embodiments, the disclosed system can include a processor configured to determine relationships between EP signals of one or more pairs of a plurality of electrodes over one or more sampling time periods, wherein the plurality electrodes are separately placed on a patient's body for collecting the EP signals, and to reconstruct geometry of the plurality of electrodes based on the relationships between the EP signals.

Abstract: Apparatus and methods remove a voltage offset from an electrical signal, specifically a biomedical signal. A signal is received at a first operational amplifier and is amplified by a gain. An amplitude of the signal is monitored, by a first pair of diode stages coupled to an output of the first operational amplifier, for the voltage offset. The amplitude of the signal is then attenuated by the first pair of diode stages and a plurality of timing banks. The attenuating includes limiting charging, by the first pair of diode stages, of the plurality of timing banks and setting a time constant based on the charging. The attenuating removes the voltage offset persisting at a threshold for a duration of at least the time constant. Saturation of the signal is limited to a saturation recovery time while the saturated signal is gradually pulled into monitoring range over the saturation recovery time.

Abstract: Systems, methods, and computer program product embodiments are disclosed for filtering noise from an input signal. An embodiment accesses the input signal having a first harmonic frequency and having the noise. The embodiment determines a quiet period in the input signal. The embodiment stores samples of the noise of the input signal in a buffer during the quiet period. The embodiment subtracts the samples from a single cycle of the noise in the buffer from the input signal to create a filtered signal. The embodiment then repeats the determining, storing, and subtracting to refine the filtered signal.