Abstract: A method for detecting unreliable bits in transistor circuitry includes applying a controllable physical parameter to a transistor circuitry, thereby causing a variation in a digital code of a cryptologic element in the transistor circuitry, the variation being a tilt or bias in a positive or negative direction. An amount of variation in the digital code of the cryptologic element is determined. Unreliable bits in the transistor circuitry are defined as those bits for which the variation is in a range defined as unreliable.
Type:
Grant
Filed:
November 20, 2019
Date of Patent:
May 4, 2021
Assignee:
Birad—Research & Development Corapany Ltd.
Inventors:
Joseph Shor, Yoav Weizman, Yitzhak Schifmann