Abstract: Antialiasing method and apparatus for video applications. A method for antialiasing a video graphic. A determination is first made as to the relative position of a desired pixel being within the polygon and proximate to the edge of the polygon. Once the relative position is known, then a determination is made as to whether it meets a first predetermined condition or a second predetermined condition. If the relative position meets the first condition, then the color of at least an adjacent pixel is blended with the color of the desired pixel in a predetermined proportion. If the relative position meets the second predetermined condition, then the color of at least an adjacent pixel is blended with the color of the desired pixel in a predetermined proportion.

Abstract: A 3-D rendering engine with embedded memory a graphics engine. A graphics engine is disclosed that includes a rendering engine for receiving graphics primitives and converting them to pixel information for transfer to a display, The rendering engine is operable to access memory locations with multiple memory access requests for a Read or a Write operation and operable in a first address space. A plurality of memory blocks are provided, each individually accessible and all configured in a virtual address space different than said first address space. A memory mapping device is provided for mapping each of the memory requests to the virtual address space. A pipeline engine is operable to pipeline the mapped memory access requests for both Read and Write operations in accordance with a predetermined pipelining scheme. The memory access requests are received in parallel and processed asynchronously, such that access to more than one of the memory blocks can occur at substantially the same time.

Abstract: A controller is composed of a control section, first and second memory sections, and a driver section. The control section divides first bitmap image data representative of n1 grayscale image into first and second data pieces, n1 being a natural number. The first memory section stores first storage data selected out of the first data piece and second bitmap image data representative of n2 grayscale image, n2 being smaller than n1. The second memory section stores second storage data selected out of the second data piece and the first storage data received from the first memory section. The driver section is configured to drive data lines of a display panel in response to the first and second storage data stored in the first and second memory sections, respectively.

Abstract: A 3-D rendering engine with embedded memory a graphics engine. A graphics engine is disclosed that includes a rendering engine for receiving graphics primitives and converting them to pixel information for transfer to a display, The rendering engine is operable to access memory locations with multiple memory access requests for a Read or a Write operation and operable in a first address space. A plurality of memory blocks are provided, each individually accessible and all configured in a virtual address space different than said first address space. A memory mapping device is provided for mapping each of the memory requests to the virtual address space. A pipeline engine is operable to pipeline the mapped memory access requests for both Read and Write operations in accordance with a predetermined pipelining scheme. The memory access requests are received in parallel and processed asynchronously, such that access to more than one of the memory blocks can occur at substantially the same time.

Abstract: A processor unit that can be used in a handheld device and configured for anti-aliasing of a vector graphics image, and including a counter value calculator configured to calculate, for one edge at a time and pixel-by-pixel, counter values for each pixel in a rasterization direction, a counter value recorder configured to store the calculated counter values in an edge buffer, and a pixel coverage value calculator configured to calculate pixel coverage values based on the stored counter values. The calculated pixel coverage values can be utilized for anti-aliasing the vector graphics image, while rasterizing the vector graphics image.

Abstract: A graphics processor or a graphics block for use in a processor includes a type buffer used for determining if a currently processed pixel requires further processing. Each pixel has a number of sub-pixels and each sub-pixel line includes at least one counter that is stored in an edge buffer. A limited edge buffer that can store edge buffer values in a limited range can be employed. Each buffer can include information regarding the whole screen or a portion of thereof. The edge buffer also can be an external or internal buffer, and when implemented internally, the graphics processor or graphics block need not employ a bi-directional bus.

Abstract: A display driver integrated circuit is provided for connection to a small-area display, the integrated circuit including a hardware-implemented graphics engine for receiving vector graphics commands and rendering image data for display pixels in dependence upon the received commands, and also including display driver circuitry for driving the connected display in accordance with the image data rendered by the graphics engine. In another aspect the graphics engine is held within the display module, but not embedded in the display driver IC. The invention provides graphics acceleration that increases display performance, but does not significantly increase cost of manufacture. Power consumption in comparison to non-accelerated CPU graphics processing is lowered.

Abstract: A controller is composed of a control section, first and second memory sections, and a driver section. The control section divides first bitmap image data representative of n1 grayscale image into first and second data pieces, n1 being a natural number. The first memory section stores first storage data selected out of the first data piece and second bitmap image data representative of n2 grayscale image, n2 being smaller than n1. The second memory section stores second storage data selected out of the second data piece and the first storage data received from the first memory section. The driver section is configured to drive data lines of a display panel in response to the first and second storage data stored in the first and second memory sections, respectively.

Abstract: A 3-D rendering engine with embedded memory a graphics engine. A graphics engine is disclosed that includes a rendering engine for receiving graphics primitives and converting them to pixel information for transfer to a display, The rendering engine is operable to access memory locations with multiple memory access requests for a Read or a Write operation and operable in a first address space. A plurality of memory blocks are provided, each individually accessible and all configured in a virtual address space different than said first address space. A memory mapping device is provided for mapping each of the memory requests to the virtual address space. A pipeline engine is operable to pipeline the mapped memory access requests for both Read and Write operations in accordance with a predetermined pipelining scheme. The memory access requests are received in parallel and processed asynchronously, such that access to more than one of the memory blocks can occur at substantially the same time.