Abstract: Methods and apparatuses for voltage comparators are described. In one example, a circuit for a voltage comparator includes a first transistor, a second transistor for receiving a first input voltage at a second transistor gate terminal, and a third transistor for receiving a second input voltage at a third transistor gate terminal. The second transistor and the third transistor are connected to the first transistor at a first node. A fourth transistor is connected to the second transistor at a second node, and a fifth transistor is connected to the third transistor at a third node. One or more capacitors are connected between the third node and a fourth node, where the fourth node includes the second transistor gate terminal. One or more capacitors are connected between the second node and a fifth node, where the fifth node includes the third transistor gate terminal. In one example operation, the one or more capacitors provide regenerative gain.

Abstract: Methods and apparatuses for clock signal phase measurement and control are described. In one example, a clock signal phase measurement system includes a reference clock signal line to provide a reference clock signal, a delay line to provide an output clock signal, and a wild clock. The clock signal phase measurement system includes a phase sensor configured to randomly and simultaneously sample the reference clock signal and the output clock signal utilizing the wild clock to obtain a phase data. The phase sensor is further configured to measure from the phase data a phase difference between the reference clock signal and the output clock signal.