Patents Assigned to Boardtek Electronics Corp.
  • Patent number: 7585419
    Abstract: A substrate structure and the fabrication method thereof are provided herein. The present invention utilizes a laminate as the support of the package process and then removes the laminate after the following package steps so as to obtain a quite smooth surface for using in the internal-plane structure of the circuit board and a stacking structure that can be applied to many different types of the chip package structures.
    Type: Grant
    Filed: June 17, 2005
    Date of Patent: September 8, 2009
    Assignee: Boardtek Electronics Corp.
    Inventor: Joseph Cheng
  • Patent number: 7556984
    Abstract: For a package structure of chip and the formation thereof, adhesive, conductive and metal layers are positioned on a substrate. The portions of the conductive and metal layers are removed to form multitudes of trenches therethrough, so that the metal layer is divided into chip supporters and conductive nodes isolated or electrical coupled each another. A chip is positioned on each of the chip supporter and electrically coupled to the conductive nodes. A molding compound covers the conductive layer, metal layer and chip. Then the substrate is removed. A dicing process as is applied with each chip or chipset as a unit to form the package structures of chip. There are advantages over improvement of reliability, reduction of package height, improve of level characteristic and heat dissipation, which may be applied to different types of semiconductor package.
    Type: Grant
    Filed: June 17, 2005
    Date of Patent: July 7, 2009
    Assignee: Boardtek Electronics Corp.
    Inventor: Joseph Cheng