Abstract: A duplex encoder/decoder pair 11 and 13 for interfacing two AC sources with two AC loads 17a 17b over a single conductor 25, with a return conductor 19 is disclosed. The pair has an encoder portion 11 with two inputs 21a 21b for connection to the two AC sources, and an output 23 for connection to the single conductor 25, and a decoder portion 13 having an input 27 for connection to the conductor 25, and two outputs 29a 29b for connection to loads 17a 17b respectively. When the first input 21a is powered, the first load 17a will be switched on, and when the second input 21b is powered, the second load 17b will be switched on. The decoder portion 13 incorporates switching circuits 43a 43b, interfaced with turn on delay timers 45a 45b respectively, to delay operating the loads at switch on.