Abstract: A snubber circuit reduces the magnitude of a flyback voltage pulse across a switching transistor caused by a transformer while incurring essentially no power losses. In one embodiment, the snubber circuit modulates the voltage pulse across the switching transistor so that the sum of the input line voltage and the flyback voltage pulse remain substantially independent of input voltage.

Abstract: Each of a plurality of parallel connected power supplies is controlled by a parallel control circuit which measures the output current from each power supply and compares this output current to the average output current produced by all the power supplies and generates a signal representative of the difference therebetween to drive the output current of the power supply toward the average output curent from all power supplies. The structure includes in addition a switch for disconnecting the parallel control circuit of a failed power supply from the system and a booster resistor for assisting in bootstrapping the startup of a given power supply being inserted into parallel with the preexisting parallel connected power supplies.

Abstract: A DC to square wave inverter (100) includes a saturable transformer (T102). The current through the saturable transformer (T102) is determined by the load current of the inverter (100). Current through the saturable transformer (T102) flows through two diodes (D100, D101) and through the base emitter junction of a power transistor (Q101). As the load current increases, the current through the diodes (D100, D101) and the power transistor (Q101) increases. This causes an increase in the voltage across the saturable transformer (T102), thus decreasing the amount of time it takes for the saturable transformer to go into saturation. A negative resistance element is coupled in series between the diodes (D100, D101) and the saturable transformer (T102). The voltage rise across the negative resistance element increases in response to increased current coming out of the saturable transformer (T102) and through the diodes (D100, D101).

Abstract: A power converter has a power switching stage which includes an output transformer containing a primary winding and a secondary winding, as well as structure for switching the current flowing through the primary from a first direction to a second direction. A feedback circuit is provided for feeding back a voltage proportional to a portion of the voltage across the primary winding on said output transformer to the structure for switching, to regeneratively turn on the switch and maintain the current flowing through the primary in the direction to which the current has been switched until the current is turned off. To help start the current through the primary in one direction or the other direction, structure is provided which supplies a pulse to the structure for switching, to positively start the current flowing in the desired direction through the primary.

Abstract: A switching power supply for converting an input voltage to a different output voltage includes a power switch for producing a sequence of pulses from the input voltage, an output filter for filtering said pulses and for producing an output voltage from the filtered pulses, and means for sensing the output voltage and for controlling the value of the output voltage to a specified value. The power supply includes means for responding to a reduction in the input voltage beneath a normal value and for increasing the duty cycle of the sequence of pulses from the power switch in response thereto. Structure is provided for automatically controlling the frequency of the sequence of pulses to a selected value and for overriding the automatic control of this frequency so as to decrease this frequency in the event the load connected to the power supply draws too much current. Circuitry is provided to minimize off time in each period of the pulse sequence under "brown-out" conditions.

Abstract: Each of a plurality of parallel connected power supplies is controlled by a parallel control circuit which measures the output current from each power supply and compares this output current to the average output current produced by all the power supplies and generates a signal representative of the difference therebetween to drive the output current of the power supply toward the average output current from all power supplies. The structure includes in addition a switch for disconnecting the parallel control circuit of a failed power supply from the system and a booster resistor for assisting in bootstrapping the startup of a given power supply being inserted into parallel with the preexisting parallel connected power supplies.

Abstract: An inverter (100) receives a DC voltage and generates therefrom a square wave output signal. The inverter includes an output transformer (T3) and a saturable core transformer (T4). The saturable core transformer (T4) provides base current for a first transistor (Q3) and a second transistor (Q4). The first transistor (Q3) and the second transistor (Q4) alternatively turn on and off, causing a square wave to appear across the secondary winding of the output transformer (T3). The primary winding of the output transformer is coupled to the collectors of the first and second transistors via a pair of windings (L10, L11) magnetically coupled to the saturable transformer (T4). A pair of diodes (D4, D5) are provided to prevent the output leads of primary windings of the output transformer (T3) from dropping below ground potential.