Patents Assigned to Bourns, Inc.
  • Patent number: 7978455
    Abstract: A variable trip limit transient blocking unit (TBU) is provided. The variable trip limit transient blocking unit circuit includes a transient blocking unit and a low-pass filter, such as an RC circuit having an RC time constant. The RC circuit is disposed to approximate an integrator operating over periods of time that are short compared to the RC time constant. The RC circuit integrates a signal representing an approximated current flowing through the transient blocking unit and triggers a disconnect threshold in the transient blocking unit when a voltage stored across a capacitor of the RC circuit reaches a predefined limit.
    Type: Grant
    Filed: August 8, 2007
    Date of Patent: July 12, 2011
    Assignee: Bourns, Inc.
    Inventor: Andrew J. Morrish
  • Patent number: 7974061
    Abstract: When a series protective element such as a transient blocking unit (TBU) is used in combination with a shunt protective element such as a gas discharge tube (GDT), firing of the GDT can cause a transient having the potential to damage the TBU. This problem can be alleviated by placing a TBU core in series between depletion mode transistors having their gates connected. With this arrangement, the GDT transient causes a transient in the TBU circuit that has the effect of switching the transistors around the TBU hard off, thereby protecting the TBU from the GDT transient.
    Type: Grant
    Filed: September 10, 2008
    Date of Patent: July 5, 2011
    Assignee: Bourns, Inc.
    Inventor: Andrew J. Morrish
  • Publication number: 20100224011
    Abstract: A torsion angle sensor for measuring the torsion angle of two shafts coupled with one another having two planetary gear sets coupled via a shared planet carrier, with the sun gear of each gear set being connected to one of the two shafts respectively; including an arrangement whereby when a torsion angle is created between the two shafts, a movable internal gear of one of the planetary gear sets is rotated corresponding to the torsion angle, with its outer surface driving a sensor gear, which is connected to a rotational position sensor, the output signal of which is proportional to the torsion angle.
    Type: Application
    Filed: February 23, 2010
    Publication date: September 9, 2010
    Applicant: BOURNS, INC.
    Inventors: Valeri Klimenko, Michael Röser
  • Patent number: 7768761
    Abstract: An electrical surge protection device (12) confers protection to an output node (13) from electrical surges on a data or power line (10) incident on an input node (11). A transistorized surge protection device (18) is located in a current path between the input node (11) and the output node (13) and is configured to assume an isolating state in response to an over-current therethrough. A voltage-triggered protective circuit comprising a diac (16) in series with a bi-directional zener diode (14) is connected between the output side of the transistorized surge protection device (18) and a surge sinking node (15). The voltage-triggered circuit assumes a low-impedance state in response to an electrical surge at output terminal 13. Consequently a surge current is passed through zener diode (14) and surge diac (16) to the surge sinking node. In response to the surge current the transistorized surge protection device (18) assumes a high impedance configuration thereby isolating output node (13) from input node (11).
    Type: Grant
    Filed: November 11, 2005
    Date of Patent: August 3, 2010
    Assignee: Bourns, Inc.
    Inventor: Richard A. Harris
  • Publication number: 20100129540
    Abstract: The current invention relates to a method for the production of a magnetic layer on a substrate, comprising the production of a printable varnish, containing 60 weight-% of neodym iron boron powder, 10 weight-% of ferrite powder, preferably strontium hexaferrite powder, 1.4 weight-% of a catalyst, 1.1 weight-% of a dispersing additive, and as the remainder a matrix, preferably an epoxy polyol matrix. These agents are mixed by means of stirring or kneading, and rolled in a three-roll mill. Preferably, they are applied to a substrate by screen printing, and subsequently pre-cured at 80 to 120° C. for six to twelve hours, and then cured at 200° C. to 220° C. for three hours.
    Type: Application
    Filed: May 23, 2008
    Publication date: May 27, 2010
    Applicant: BOURNS, INC.
    Inventor: Oliver Senkel
  • Patent number: 7646576
    Abstract: An apparatus and method for high-voltage transient blocking employing a transient blocking unit (TBU) that has at least one depletion mode n-channel device interconnected with at least one depletion mode p-channel device such that a transient alters a bias voltage Vp of the p-channel device and a bias voltage Vn of the n-channel device in concert. Specifically, the bias voltages are altered such that the p-channel device and n-channel device mutually switch off to block the transient. The depletion mode n-channel device employs a set of cascaded low-voltage depletion mode field effect transistors (FETs) such as metal-oxide-silicon field effect transistors (MOSFETs) connected source-to-drain to achieve the desired high-voltage operation of the TBU.
    Type: Grant
    Filed: November 9, 2005
    Date of Patent: January 12, 2010
    Assignee: Bourns, Inc.
    Inventors: Richard A. Harris, Francois Hebert
  • Patent number: 7616418
    Abstract: A transient blocking unit (TBU) includes at least two depletion mode transistors connected to each other such that they can rapidly switch from a normal low-impedance state to a high-impedance current blocking state in response to an over-voltage or over-current condition. This behavior makes TBUs useful for protecting electrical devices and circuit from harmful electrical transients. Some kinds of transistors can exhibit a phenomenon known as current collapse, where channel conductance is temporarily reduced after exposure to high voltage. Although current collapse is undesirable, transistors exhibiting current collapse can have otherwise favorable properties for TBU applications. According to the present invention, a TBU is provided where a diode is placed in parallel with a TBU transistor that can exhibit current collapse. The diode prevents high power dissipation in a current collapsed transistor, thereby reducing the vulnerability of the TBU to permanent damage or destruction in service.
    Type: Grant
    Filed: October 22, 2007
    Date of Patent: November 10, 2009
    Assignee: Bourns, Inc.
    Inventor: Richard A. Harris
  • Patent number: 7576962
    Abstract: A method and apparatus for transient blocking relying on a transient blocking device and a sampling circuit. The transient blocking device has at least one depletion mode n-channel device interconnected with at least one depletion mode p-channel device such that a transient alters a bias voltage Vp of the depletion mode p-channel device and a bias voltage Vn of the depletion mode n-channel device in such a manner that the depletion mode devices mutually switch off to block the transient. The sampling circuit is interconnected with the depletion mode p-channel device and the depletion mode n-channel device to determine whether the transient persists. In the event of a persistent transient, the sampling circuit uses a disconnect element for permanently blocking the transient blocking device.
    Type: Grant
    Filed: June 2, 2006
    Date of Patent: August 18, 2009
    Assignee: Bourns, Inc.
    Inventor: Richard A. Harris
  • Patent number: 7557394
    Abstract: A lateral high-voltage depletion-mode device structure in which fingers of semiconductor material are interdigitated with trench gates. Since the effective channel area is proportional to the depth of the trenches, a large amount of active channel area can be achieved for a given surface area.
    Type: Grant
    Filed: November 9, 2005
    Date of Patent: July 7, 2009
    Assignee: Bourns, Inc.
    Inventors: Richard A. Blanchard, Françoise Hébert
  • Patent number: 7492566
    Abstract: A transient blocking unit (TBU) having reduced series impedance is provided. A TBU includes two or more depletion mode transistors arranged to provide a low series impedance in normal operation and a high series impedance when the input current exceeds a predetermined threshold. A nonlinear impedance element is included in the TBU that acts as a current limiter having a substantially constant saturation current over a range of applied voltages. This saturation current is selected to be the threshold current of the TBU. When the threshold is exceeded, the voltage developed across the nonlinear impedance element tends to drive the TBU into its high impedance state. When the operating current is below threshold, the TBU series resistance is relatively low because the nonlinear impedance element is in its low-resistance state. The nonlinear impedance element can be a separate circuit element, or it can be integrated with one or more of the TBU transistors.
    Type: Grant
    Filed: January 12, 2006
    Date of Patent: February 17, 2009
    Assignee: Bourns, Inc.
    Inventor: Richard A. Harris
  • Patent number: 7452224
    Abstract: A clockspring device that includes an outer housing with a circumferential wall that defines a chamber. The circumferential wall includes a vertically-oriented track. A rotor having a keyway is configured to fit at least partially within the outer housing. A coil of cable is positioned within the chamber and has a first end and a second end. The first end of the coil of cable is attached to the rotor and the second end of the coil of cable is attached to the outer housing. A clip having a first end, a second end, and a middle portion is configured to fit within the vertically-oriented track. The middle portion of the clip has two flexible tabs. Each flexible tab has a portion that extends away from the middle portion. The flexible tabs are compressed or bent in order to insert the clip in the track and slide it along the track and into an engaged position. When the clip is in the engaged position, the position of the rotor is fixed with respect to the outer housing.
    Type: Grant
    Filed: August 4, 2007
    Date of Patent: November 18, 2008
    Assignee: Bourns, Inc.
    Inventors: Ken McDonald, Ernest Roy Thompson
  • Patent number: 7339370
    Abstract: A sensor having a first array of N magnetic pole pairs, where N is a positive number, and a second array of M magnetic pole pairs, arranged substantially in parallel to the first array, where M is a positive number different from N, such as N?1 or N+1. A first magnetic pole in the second array is aligned with a first magnetic pole in the first array. The remaining magnetic poles in the second array are arranged such that each one of them is positioned with respect to at least one pole in the first array to form a magnetic field with an angular orientation with respect to the two poles. This arrangement of magnetic pole pairs can be used to measure absolute position. A third array of M magnetic pole pairs may be arranged substantially in parallel with the second array. The second and third arrays of magnetic pole pairs may be used to measure relative position between the two arrays.
    Type: Grant
    Filed: December 9, 2005
    Date of Patent: March 4, 2008
    Assignee: Bourns, Inc.
    Inventors: Lawrence B. Reimer, Daniel Russell Reneau
  • Patent number: 7300203
    Abstract: A sensor assembly having a housing including a first portion and a second portion. One of the portions of the housing includes a plurality of walls. The walls at least partially define a chamber. The assembly also includes a hinge connected to the first portion and to the second portion. The second portion is pivotable about the hinge from an open position with respect to the first portion to a closed position with respect to the first portion. The assembly also includes a sensor positioned within the chamber and substantially encircled by the plurality of walls. The sensor is partially enclosed by the first portion and second portion when the second portion is in the closed position.
    Type: Grant
    Filed: October 6, 2005
    Date of Patent: November 27, 2007
    Assignee: Bourns, Inc.
    Inventor: Jeffrey Tola
  • Patent number: 7205771
    Abstract: The circuit arrangement for measuring current flowing through a high-resistance consumer (R1) contains a current mirror circuit (1), in the first branch (T1) of which the high-resistance consumer is connected in series and in the second branch of which an evaluation circuit (3, 4, 5) is connected. The high-resistance consumer is, in particular, a lambda probe (R1) of the catalytic converter of an internal combustion engine, whose resistance value is on the order of several M? and which is operated at high operating temperatures of around 400° C. Accordingly, very small currents on the order of several nA to several ?A must be measured. Thanks to the current mirror circuit, a current (ID2) is generated in the second branch that is equal in magnitude to the current (ID1) flowing through the first branch and the consumer (R1). Thus, the current flowing through the second branch does not load the first branch. All components can be integrated in an integrated circuit, such as an ASIC.
    Type: Grant
    Filed: December 13, 2005
    Date of Patent: April 17, 2007
    Assignee: Bourns, Inc.
    Inventor: Farhad Berton
  • Publication number: 20060176143
    Abstract: A potentiometer having a wiper track which is formed by a number of electrically conductive surfaces, a spacing between adjacent conductor surfaces, at least one contacts per wiper track fastened to a moving wiper, each contact is a cylindrical body whose length and arrangement are adapted to the width of the conductor surface and the width of the spacing so that in each position of the wiper at least one contact is in electrical contact with at least one conductor surface.
    Type: Application
    Filed: January 30, 2006
    Publication date: August 10, 2006
    Applicant: Bourns, Inc.
    Inventor: Hans-Peter Ebnet
  • Publication number: 20060176675
    Abstract: An electronic device is formed of multiple, alternating layers of conductive polymer and metal foil electrodes, in which electrical connections between selected electrodes are provided by cross-conductors formed by plated through-hole vias. More specifically, the device includes a first cross-conductor that electrically connects a first set of electrodes, and a second cross-conductor electrically connects a second set of electrodes. Correspondingly, the first cross-conductor is electrically and physically isolated from the second set of electrodes, while the second cross-conductor is electrically and physically isolated from the first set of electrodes. The electrodes are etched to form an isolation gap that isolates that electrode from either the first or second cross-conductor. The first and second cross-conductors, in turn, are formed by plating the through-hole vias, so as to establish electrically-conductive contact with those electrodes not separated from the via by an isolation gap.
    Type: Application
    Filed: March 15, 2004
    Publication date: August 10, 2006
    Applicant: Bourns, Inc.
    Inventors: Gordon Bourns, Gary Straker, Ray Burke, Thanh Nguyen
  • Publication number: 20060125467
    Abstract: The circuit arrangement for measuring current flowing through a high-resistance consumer (R1) contains a current mirror circuit (1), in the first branch (T1) of which the high-resistance consumer is connected in series and in the second branch of which an evaluation circuit (3, 4, 5) is connected. The high-resistance consumer is, in particular, a lambda probe (R1) of the catalytic converter of an internal combustion engine, whose resistance value is on the order of several M? and which is operated at high operating temperatures of around 400° C. Accordingly, very small currents on the order of several nA to several ?A must be measured. Thanks to the current mirror circuit, a current (ID2) is generated in the second branch that is equal in magnitude to the current (ID1) flowing through the first branch and the consumer (R1). Thus, the current flowing through the second branch does not load the first branch. All components can be integrated in an integrated circuit, such as an ASIC.
    Type: Application
    Filed: December 13, 2005
    Publication date: June 15, 2006
    Applicant: Bourns, Inc.
    Inventor: Farhad Berton
  • Publication number: 20060113990
    Abstract: The linear position sensor has a permanent magnet and a magnetic field sensor, which generates an output signal dependent on the direction of the magnetic field. The permanent magnet and the magnetic field sensor are moveable relative to each other along the linear movement path. An evaluation circuit converts the output signal of the magnetic field sensor to a signal that corresponds to a relative position between the magnetic field sensor and the permanent magnet along said linear movement path.
    Type: Application
    Filed: November 29, 2005
    Publication date: June 1, 2006
    Applicant: Bourns, Inc.
    Inventor: Dieter Schodlbauer
  • Publication number: 20060055500
    Abstract: The present invention relates to encapsulated or insulated devices. In certain environments and applications, it is necessary to protect devices from external agents. The present invention achieves this by providing a device comprising a segment of insulating material having an aperture defined therein. An element of active, for example positive temperature coefficient (PTC), material is received within the defined aperture. The element is substantially covered by a first metal layer on one side and a second metal layer on the opposing side. A first layer of insulating material substantially covers the first metal layer and a second layer of insulating material substantially covers the second layer of metal. A first terminal provides an external electrical connection to the first metal layer and a second terminal provides an external electrical connection to the second metal layer.
    Type: Application
    Filed: January 24, 2003
    Publication date: March 16, 2006
    Applicant: BOURNS, INC
    Inventors: Ray Burke, Maurice O'Brien, Brian Ahearne, John Kelly
  • Publication number: 20060055501
    Abstract: An electronic device is manufactured using printed circuit board manufacturing processes. In particular, a laminar device comprises a first metal layer, a second metal layer, at least one layer of device, material sandwiched between the first and second metal layers. A first layer of insulating material substantially covers the first metal layer. A third metal layer is provided on the first layer of insulating material. This third metal layer is divided to provide a first terminal and a second terminal. The first terminal is electrically connected to the first metal layer by a conductive interconnect formed through said first layer of insulating material, and the second terminal is electrically connected to said second metal layer by a conductive path comprising an insulated conductive channel which passes through and is insulated from said first metal layer and said at least one layer of device material.
    Type: Application
    Filed: March 14, 2003
    Publication date: March 16, 2006
    Applicant: BOURNS., INC
    Inventors: Ray Burke, Maurice O'Brien, Poting Lan, Stelar Chu