Abstract: An integrated circuit in silicon on insulator technology comprises a JFET transistor with an insulated source and drain of one conductivity type in the upper part of a semiconductor island, an upper gate between the source and the drain, a buried insulating layer supporting the island, and a buried electrode in the island and in contact with the insulating layer. That electrode has a second conductivity type different from the first. A zone is diffused into at least one edge of the island from a conductive material covering the edge, that conductive material being doped with impurities of the second conductivity type. The diffused zone of the second conductivity type is electrically insulated from the source and drain and ensures the electrical contacting of the electrode and the conductive material constituting the electrical contact to the electrode and source. Drain and gate contacts are also provided which are electrically insulated from one another and from the electrode contact.
Type:
Grant
Filed:
June 14, 1991
Date of Patent:
July 14, 1992
Assignee:
Brevatome
Inventors:
Jean-Philippe Blanc, Joelle Bonaime, Jean du P. De Poncharra, Robert Truche
Abstract: Composite materials having properties of superconductivity which remain at much higher temperatures than conventional superconductors and intended for such applications as the construction of magnetometers or thermometers are provided in a divided form and in a monocrystalline matrix consisting of semiconducting material with zones of superconductivity formed by microprecipitates of one of the constituents of the semiconducting material.