Patents Assigned to Brilliance Semiconductor Inc.
  • Non-volatile SRAM cell having split-gate transistors
    Patent number: 7054194
    Abstract: This specification discloses a non-volatile static random access memory (SRAM) cell with the feature of keeping data even after the power is turned off. It includes a static random access unit and a non-volatile memory unit. Therefore, it has the random access property of the SRAM normally. After the power is turned off, it can store data in the non-volatile memory unit, so that the data can be automatically restored to the static random access unit from the non-volatile memory unit when the power is turned on.
    Type: Grant
    Filed: June 27, 2003
    Date of Patent: May 30, 2006
    Assignee: Brilliance Semiconductor Inc.
    Inventors: Shion-Hau Liaw, Hung-Ming Yang
  • Combination of SRAM and MROM cells
    Patent number: 6826073
    Abstract: A new memory cell combination is disclosed. It includes a static random access memory (SRAM) unit and a mask read only memory (MROM) unit. The prior art separates the two memory units in different areas on a chip so that the circuit layout is not optimized. The disclosed cell combines them in the same area, saving more than 20% of the area.
    Type: Grant
    Filed: June 30, 2003
    Date of Patent: November 30, 2004
    Assignee: Brilliance Semiconductor Inc.
    Inventors: Shion-Hau Liaw, Li-Yeh Chen