Abstract: A comparator in an AD conversion part performs, under the control of reading part, a first comparison processing outputting a digitized first comparison result signal with respect to a voltage signal corresponding to an overflow charge overflowing from a PD1 to an FD1 in an integration period and a second comparison processing outputting a digitized second comparison result signal with respect to a voltage signal corresponding to a accumulated charge of the PD1 transferred to the FD1 in a transfer period after the integration period and, in the first comparison processing, starts an AD conversion processing comparing the voltage signal of the output buffer part and the reference voltage and outputting the digitized comparison result signal with a delay from the starting time of the first comparison processing. The comparator lowers a power consumption and suppresses an influence of a dark current of the FD and deterioration of an image.